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sys/dev/ixl/ixl_txrx.c
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#include "ixl.h" | #include "ixl.h" | ||||
#ifdef RSS | #ifdef RSS | ||||
#include <net/rss_config.h> | #include <net/rss_config.h> | ||||
#endif | #endif | ||||
/* Local Prototypes */ | /* Local Prototypes */ | ||||
static void ixl_rx_checksum(if_rxd_info_t ri, u32 status, u32 error, u8 ptype); | static u8 ixl_rx_checksum(if_rxd_info_t ri, u32 status, u32 error, u8 ptype); | ||||
static int ixl_isc_txd_encap(void *arg, if_pkt_info_t pi); | static int ixl_isc_txd_encap(void *arg, if_pkt_info_t pi); | ||||
static void ixl_isc_txd_flush(void *arg, uint16_t txqid, qidx_t pidx); | static void ixl_isc_txd_flush(void *arg, uint16_t txqid, qidx_t pidx); | ||||
static int ixl_isc_txd_credits_update_hwb(void *arg, uint16_t txqid, bool clear); | static int ixl_isc_txd_credits_update_hwb(void *arg, uint16_t txqid, bool clear); | ||||
static int ixl_isc_txd_credits_update_dwb(void *arg, uint16_t txqid, bool clear); | static int ixl_isc_txd_credits_update_dwb(void *arg, uint16_t txqid, bool clear); | ||||
static void ixl_isc_rxd_refill(void *arg, if_rxd_update_t iru); | static void ixl_isc_rxd_refill(void *arg, if_rxd_update_t iru); | ||||
static void ixl_isc_rxd_flush(void *arg, uint16_t rxqid, uint8_t flid __unused, | static void ixl_isc_rxd_flush(void *arg, uint16_t rxqid, uint8_t flid __unused, | ||||
▲ Show 20 Lines • Show All 652 Lines • ▼ Show 20 Lines | do { | ||||
i++; | i++; | ||||
} while (!eop); | } while (!eop); | ||||
/* capture data for dynamic ITR adjustment */ | /* capture data for dynamic ITR adjustment */ | ||||
rxr->packets++; | rxr->packets++; | ||||
rxr->rx_packets++; | rxr->rx_packets++; | ||||
if ((if_getcapenable(vsi->ifp) & IFCAP_RXCSUM) != 0) | if ((if_getcapenable(vsi->ifp) & IFCAP_RXCSUM) != 0) | ||||
ixl_rx_checksum(ri, status, error, ptype); | rxr->csum_errs += ixl_rx_checksum(ri, status, error, ptype); | ||||
ri->iri_flowid = le32toh(cur->wb.qword0.hi_dword.rss); | ri->iri_flowid = le32toh(cur->wb.qword0.hi_dword.rss); | ||||
ri->iri_rsstype = ixl_ptype_to_hash(ptype); | ri->iri_rsstype = ixl_ptype_to_hash(ptype); | ||||
ri->iri_vtag = vtag; | ri->iri_vtag = vtag; | ||||
ri->iri_nfrags = i; | ri->iri_nfrags = i; | ||||
if (vtag) | if (vtag) | ||||
ri->iri_flags |= M_VLANTAG; | ri->iri_flags |= M_VLANTAG; | ||||
return (0); | return (0); | ||||
} | } | ||||
/********************************************************************* | /********************************************************************* | ||||
* | * | ||||
* Verify that the hardware indicated that the checksum is valid. | * Verify that the hardware indicated that the checksum is valid. | ||||
* Inform the stack about the status of checksum so that stack | * Inform the stack about the status of checksum so that stack | ||||
* doesn't spend time verifying the checksum. | * doesn't spend time verifying the checksum. | ||||
* | * | ||||
*********************************************************************/ | *********************************************************************/ | ||||
static void | static u8 | ||||
ixl_rx_checksum(if_rxd_info_t ri, u32 status, u32 error, u8 ptype) | ixl_rx_checksum(if_rxd_info_t ri, u32 status, u32 error, u8 ptype) | ||||
{ | { | ||||
struct i40e_rx_ptype_decoded decoded; | struct i40e_rx_ptype_decoded decoded; | ||||
ri->iri_csum_flags = 0; | ri->iri_csum_flags = 0; | ||||
/* No L3 or L4 checksum was calculated */ | /* No L3 or L4 checksum was calculated */ | ||||
if (!(status & (1 << I40E_RX_DESC_STATUS_L3L4P_SHIFT))) | if (!(status & (1 << I40E_RX_DESC_STATUS_L3L4P_SHIFT))) | ||||
return; | return (0); | ||||
decoded = decode_rx_desc_ptype(ptype); | decoded = decode_rx_desc_ptype(ptype); | ||||
/* IPv6 with extension headers likely have bad csum */ | /* IPv6 with extension headers likely have bad csum */ | ||||
if (decoded.outer_ip == I40E_RX_PTYPE_OUTER_IP && | if (decoded.outer_ip == I40E_RX_PTYPE_OUTER_IP && | ||||
decoded.outer_ip_ver == I40E_RX_PTYPE_OUTER_IPV6) { | decoded.outer_ip_ver == I40E_RX_PTYPE_OUTER_IPV6) { | ||||
if (status & | if (status & | ||||
(1 << I40E_RX_DESC_STATUS_IPV6EXADD_SHIFT)) { | (1 << I40E_RX_DESC_STATUS_IPV6EXADD_SHIFT)) { | ||||
ri->iri_csum_flags = 0; | ri->iri_csum_flags = 0; | ||||
return; | return (1); | ||||
} | } | ||||
} | } | ||||
ri->iri_csum_flags |= CSUM_L3_CALC; | ri->iri_csum_flags |= CSUM_L3_CALC; | ||||
/* IPv4 checksum error */ | /* IPv4 checksum error */ | ||||
if (error & (1 << I40E_RX_DESC_ERROR_IPE_SHIFT)) | if (error & (1 << I40E_RX_DESC_ERROR_IPE_SHIFT)) | ||||
return; | return (1); | ||||
ri->iri_csum_flags |= CSUM_L3_VALID; | ri->iri_csum_flags |= CSUM_L3_VALID; | ||||
ri->iri_csum_flags |= CSUM_L4_CALC; | ri->iri_csum_flags |= CSUM_L4_CALC; | ||||
/* L4 checksum error */ | /* L4 checksum error */ | ||||
if (error & (1 << I40E_RX_DESC_ERROR_L4E_SHIFT)) | if (error & (1 << I40E_RX_DESC_ERROR_L4E_SHIFT)) | ||||
return; | return (1); | ||||
ri->iri_csum_flags |= CSUM_L4_VALID; | ri->iri_csum_flags |= CSUM_L4_VALID; | ||||
ri->iri_csum_data |= htons(0xffff); | ri->iri_csum_data |= htons(0xffff); | ||||
return (0); | |||||
} | } | ||||
/* Set Report Status queue fields to 0 */ | /* Set Report Status queue fields to 0 */ | ||||
void | void | ||||
ixl_init_tx_rsqs(struct ixl_vsi *vsi) | ixl_init_tx_rsqs(struct ixl_vsi *vsi) | ||||
{ | { | ||||
if_softc_ctx_t scctx = vsi->shared; | if_softc_ctx_t scctx = vsi->shared; | ||||
struct ixl_tx_queue *tx_que; | struct ixl_tx_queue *tx_que; | ||||
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