Changeset View
Changeset View
Standalone View
Standalone View
sys/dev/mrsas/mrsas_fp.c
Show First 20 Lines • Show All 186 Lines • ▼ Show 20 Lines | |||||
MR_LdRaidGet(u_int32_t ld, MR_DRV_RAID_MAP_ALL * map) | MR_LdRaidGet(u_int32_t ld, MR_DRV_RAID_MAP_ALL * map) | ||||
{ | { | ||||
return (&map->raidMap.ldSpanMap[ld].ldRaid); | return (&map->raidMap.ldSpanMap[ld].ldRaid); | ||||
} | } | ||||
u_int16_t | u_int16_t | ||||
MR_GetLDTgtId(u_int32_t ld, MR_DRV_RAID_MAP_ALL * map) | MR_GetLDTgtId(u_int32_t ld, MR_DRV_RAID_MAP_ALL * map) | ||||
{ | { | ||||
return (map->raidMap.ldSpanMap[ld].ldRaid.targetId); | return le16toh(map->raidMap.ldSpanMap[ld].ldRaid.targetId); | ||||
} | } | ||||
static u_int16_t | static u_int16_t | ||||
MR_LdSpanArrayGet(u_int32_t ld, u_int32_t span, MR_DRV_RAID_MAP_ALL * map) | MR_LdSpanArrayGet(u_int32_t ld, u_int32_t span, MR_DRV_RAID_MAP_ALL * map) | ||||
{ | { | ||||
return map->raidMap.ldSpanMap[ld].spanBlock[span].span.arrayRef; | return le16toh(map->raidMap.ldSpanMap[ld].spanBlock[span].span.arrayRef); | ||||
} | } | ||||
static u_int8_t | static u_int8_t | ||||
MR_LdDataArmGet(u_int32_t ld, u_int32_t armIdx, MR_DRV_RAID_MAP_ALL * map) | MR_LdDataArmGet(u_int32_t ld, u_int32_t armIdx, MR_DRV_RAID_MAP_ALL * map) | ||||
{ | { | ||||
return map->raidMap.ldSpanMap[ld].dataArmMap[armIdx]; | return map->raidMap.ldSpanMap[ld].dataArmMap[armIdx]; | ||||
} | } | ||||
static u_int16_t | static u_int16_t | ||||
MR_PdDevHandleGet(u_int32_t pd, MR_DRV_RAID_MAP_ALL * map) | MR_PdDevHandleGet(u_int32_t pd, MR_DRV_RAID_MAP_ALL * map) | ||||
{ | { | ||||
return map->raidMap.devHndlInfo[pd].curDevHdl; | return map->raidMap.devHndlInfo[pd].curDevHdl; | ||||
} | } | ||||
static u_int8_t MR_PdInterfaceTypeGet(u_int32_t pd, MR_DRV_RAID_MAP_ALL *map) | static u_int8_t MR_PdInterfaceTypeGet(u_int32_t pd, MR_DRV_RAID_MAP_ALL *map) | ||||
{ | { | ||||
return map->raidMap.devHndlInfo[pd].interfaceType; | return map->raidMap.devHndlInfo[pd].interfaceType; | ||||
} | } | ||||
static u_int16_t | static u_int16_t | ||||
MR_ArPdGet(u_int32_t ar, u_int32_t arm, MR_DRV_RAID_MAP_ALL * map) | MR_ArPdGet(u_int32_t ar, u_int32_t arm, MR_DRV_RAID_MAP_ALL * map) | ||||
{ | { | ||||
return map->raidMap.arMapInfo[ar].pd[arm]; | return le16toh(map->raidMap.arMapInfo[ar].pd[arm]); | ||||
} | } | ||||
static MR_LD_SPAN * | static MR_LD_SPAN * | ||||
MR_LdSpanPtrGet(u_int32_t ld, u_int32_t span, MR_DRV_RAID_MAP_ALL * map) | MR_LdSpanPtrGet(u_int32_t ld, u_int32_t span, MR_DRV_RAID_MAP_ALL * map) | ||||
{ | { | ||||
return &map->raidMap.ldSpanMap[ld].spanBlock[span].span; | return &map->raidMap.ldSpanMap[ld].spanBlock[span].span; | ||||
} | } | ||||
▲ Show 20 Lines • Show All 53 Lines • ▼ Show 20 Lines | device_printf(sc->mrsas_dev, | ||||
"from %s %d map0 %p map1 %p map size %d \n", __func__, __LINE__, | "from %s %d map0 %p map1 %p map size %d \n", __func__, __LINE__, | ||||
sc->raidmap_mem[0], sc->raidmap_mem[1], sc->maxRaidMapSize); | sc->raidmap_mem[0], sc->raidmap_mem[1], sc->maxRaidMapSize); | ||||
return 1; | return 1; | ||||
} | } | ||||
#if VD_EXT_DEBUG | #if VD_EXT_DEBUG | ||||
device_printf(sc->mrsas_dev, | device_printf(sc->mrsas_dev, | ||||
" raidMapSize 0x%x, descTableOffset 0x%x, " | " raidMapSize 0x%x, descTableOffset 0x%x, " | ||||
" descTableSize 0x%x, descTableNumElements 0x%x \n", | " descTableSize 0x%x, descTableNumElements 0x%x \n", | ||||
fw_map_dyn->raidMapSize, fw_map_dyn->descTableOffset, | fw_map_dyn->raidMapSize, le32toh(fw_map_dyn->descTableOffset), | ||||
fw_map_dyn->descTableSize, fw_map_dyn->descTableNumElements); | fw_map_dyn->descTableSize, fw_map_dyn->descTableNumElements); | ||||
#endif | #endif | ||||
desc_table = (MR_RAID_MAP_DESC_TABLE *) ((char *)fw_map_dyn + | desc_table = (MR_RAID_MAP_DESC_TABLE *) ((char *)fw_map_dyn + | ||||
fw_map_dyn->descTableOffset); | le32toh(fw_map_dyn->descTableOffset)); | ||||
if (desc_table != fw_map_dyn->raidMapDescTable) { | if (desc_table != fw_map_dyn->raidMapDescTable) { | ||||
device_printf(sc->mrsas_dev, | device_printf(sc->mrsas_dev, | ||||
"offsets of desc table are not matching returning " | "offsets of desc table are not matching returning " | ||||
" FW raid map has been changed: desc %p original %p\n", | " FW raid map has been changed: desc %p original %p\n", | ||||
desc_table, fw_map_dyn->raidMapDescTable); | desc_table, fw_map_dyn->raidMapDescTable); | ||||
} | } | ||||
memset(drv_map, 0, sc->drv_map_sz); | memset(drv_map, 0, sc->drv_map_sz); | ||||
ld_count = fw_map_dyn->ldCount; | ld_count = le16toh(fw_map_dyn->ldCount); | ||||
pDrvRaidMap->ldCount = ld_count; | pDrvRaidMap->ldCount = htole16(ld_count); | ||||
pDrvRaidMap->fpPdIoTimeoutSec = fw_map_dyn->fpPdIoTimeoutSec; | pDrvRaidMap->fpPdIoTimeoutSec = fw_map_dyn->fpPdIoTimeoutSec; | ||||
pDrvRaidMap->totalSize = sizeof(MR_DRV_RAID_MAP_ALL); | pDrvRaidMap->totalSize = htole32(sizeof(MR_DRV_RAID_MAP_ALL)); | ||||
/* point to actual data starting point */ | /* point to actual data starting point */ | ||||
raid_map_data = (char *)fw_map_dyn + | raid_map_data = (char *)fw_map_dyn + | ||||
fw_map_dyn->descTableOffset + fw_map_dyn->descTableSize; | le32toh(fw_map_dyn->descTableOffset) + | ||||
le32toh(fw_map_dyn->descTableSize); | |||||
for (i = 0; i < fw_map_dyn->descTableNumElements; ++i) { | for (i = 0; i < le32toh(fw_map_dyn->descTableNumElements); ++i) { | ||||
if (!desc_table) { | if (!desc_table) { | ||||
device_printf(sc->mrsas_dev, | device_printf(sc->mrsas_dev, | ||||
"desc table is null, coming out %p \n", desc_table); | "desc table is null, coming out %p \n", desc_table); | ||||
return 1; | return 1; | ||||
} | } | ||||
#if VD_EXT_DEBUG | #if VD_EXT_DEBUG | ||||
device_printf(sc->mrsas_dev, "raid_map_data %p \n", raid_map_data); | device_printf(sc->mrsas_dev, "raid_map_data %p \n", raid_map_data); | ||||
device_printf(sc->mrsas_dev, | device_printf(sc->mrsas_dev, | ||||
"desc table %p \n", desc_table); | "desc table %p \n", desc_table); | ||||
device_printf(sc->mrsas_dev, | device_printf(sc->mrsas_dev, | ||||
"raidmap type %d, raidmapOffset 0x%x, " | "raidmap type %d, raidmapOffset 0x%x, " | ||||
" raid map number of elements 0%x, raidmapsize 0x%x\n", | " raid map number of elements 0%x, raidmapsize 0x%x\n", | ||||
desc_table->raidMapDescType, desc_table->raidMapDescOffset, | le32toh(desc_table->raidMapDescType), desc_table->raidMapDescOffset, | ||||
desc_table->raidMapDescElements, desc_table->raidMapDescBufferSize); | le32toh(desc_table->raidMapDescElements), desc_table->raidMapDescBufferSize); | ||||
#endif | #endif | ||||
switch (desc_table->raidMapDescType) { | switch (le32toh(desc_table->raidMapDescType)) { | ||||
case RAID_MAP_DESC_TYPE_DEVHDL_INFO: | case RAID_MAP_DESC_TYPE_DEVHDL_INFO: | ||||
fw_map_dyn->RaidMapDescPtrs.ptrStruct.devHndlInfo = (MR_DEV_HANDLE_INFO *) | fw_map_dyn->RaidMapDescPtrs.ptrStruct.devHndlInfo = (MR_DEV_HANDLE_INFO *) | ||||
((char *)raid_map_data + desc_table->raidMapDescOffset); | ((char *)raid_map_data + le32toh(desc_table->raidMapDescOffset)); | ||||
#if VD_EXT_DEBUG | #if VD_EXT_DEBUG | ||||
device_printf(sc->mrsas_dev, | device_printf(sc->mrsas_dev, | ||||
"devHndlInfo address %p\n", fw_map_dyn->RaidMapDescPtrs.ptrStruct.devHndlInfo); | "devHndlInfo address %p\n", fw_map_dyn->RaidMapDescPtrs.ptrStruct.devHndlInfo); | ||||
#endif | #endif | ||||
memcpy(pDrvRaidMap->devHndlInfo, fw_map_dyn->RaidMapDescPtrs.ptrStruct.devHndlInfo, | memcpy(pDrvRaidMap->devHndlInfo, fw_map_dyn->RaidMapDescPtrs.ptrStruct.devHndlInfo, | ||||
sizeof(MR_DEV_HANDLE_INFO) * desc_table->raidMapDescElements); | sizeof(MR_DEV_HANDLE_INFO) * le32toh(desc_table->raidMapDescElements)); | ||||
break; | break; | ||||
case RAID_MAP_DESC_TYPE_TGTID_INFO: | case RAID_MAP_DESC_TYPE_TGTID_INFO: | ||||
fw_map_dyn->RaidMapDescPtrs.ptrStruct.ldTgtIdToLd = (u_int16_t *) | fw_map_dyn->RaidMapDescPtrs.ptrStruct.ldTgtIdToLd = (u_int16_t *) | ||||
((char *)raid_map_data + desc_table->raidMapDescOffset); | ((char *)raid_map_data + | ||||
le32toh(desc_table->raidMapDescOffset)); | |||||
#if VD_EXT_DEBUG | #if VD_EXT_DEBUG | ||||
device_printf(sc->mrsas_dev, | device_printf(sc->mrsas_dev, | ||||
"ldTgtIdToLd address %p\n", fw_map_dyn->RaidMapDescPtrs.ptrStruct.ldTgtIdToLd); | "ldTgtIdToLd address %p\n", fw_map_dyn->RaidMapDescPtrs.ptrStruct.ldTgtIdToLd); | ||||
#endif | #endif | ||||
for (j = 0; j < desc_table->raidMapDescElements; j++) { | for (j = 0; j < le32toh(desc_table->raidMapDescElements); j++) { | ||||
pDrvRaidMap->ldTgtIdToLd[j] = fw_map_dyn->RaidMapDescPtrs.ptrStruct.ldTgtIdToLd[j]; | pDrvRaidMap->ldTgtIdToLd[j] = fw_map_dyn->RaidMapDescPtrs.ptrStruct.ldTgtIdToLd[j]; | ||||
#if VD_EXT_DEBUG | #if VD_EXT_DEBUG | ||||
device_printf(sc->mrsas_dev, | device_printf(sc->mrsas_dev, | ||||
" %d drv ldTgtIdToLd %d\n", j, pDrvRaidMap->ldTgtIdToLd[j]); | " %d drv ldTgtIdToLd %d\n", j, pDrvRaidMap->ldTgtIdToLd[j]); | ||||
#endif | #endif | ||||
} | } | ||||
break; | break; | ||||
case RAID_MAP_DESC_TYPE_ARRAY_INFO: | case RAID_MAP_DESC_TYPE_ARRAY_INFO: | ||||
fw_map_dyn->RaidMapDescPtrs.ptrStruct.arMapInfo = (MR_ARRAY_INFO *) ((char *)raid_map_data + | fw_map_dyn->RaidMapDescPtrs.ptrStruct.arMapInfo = (MR_ARRAY_INFO *) ((char *)raid_map_data + | ||||
desc_table->raidMapDescOffset); | le32toh(desc_table->raidMapDescOffset)); | ||||
#if VD_EXT_DEBUG | #if VD_EXT_DEBUG | ||||
device_printf(sc->mrsas_dev, | device_printf(sc->mrsas_dev, | ||||
"arMapInfo address %p\n", fw_map_dyn->RaidMapDescPtrs.ptrStruct.arMapInfo); | "arMapInfo address %p\n", fw_map_dyn->RaidMapDescPtrs.ptrStruct.arMapInfo); | ||||
#endif | #endif | ||||
memcpy(pDrvRaidMap->arMapInfo, fw_map_dyn->RaidMapDescPtrs.ptrStruct.arMapInfo, | memcpy(pDrvRaidMap->arMapInfo, fw_map_dyn->RaidMapDescPtrs.ptrStruct.arMapInfo, | ||||
sizeof(MR_ARRAY_INFO) * desc_table->raidMapDescElements); | sizeof(MR_ARRAY_INFO) * le32toh(desc_table->raidMapDescElements)); | ||||
break; | break; | ||||
case RAID_MAP_DESC_TYPE_SPAN_INFO: | case RAID_MAP_DESC_TYPE_SPAN_INFO: | ||||
fw_map_dyn->RaidMapDescPtrs.ptrStruct.ldSpanMap = (MR_LD_SPAN_MAP *) ((char *)raid_map_data + | fw_map_dyn->RaidMapDescPtrs.ptrStruct.ldSpanMap = (MR_LD_SPAN_MAP *) ((char *)raid_map_data + | ||||
desc_table->raidMapDescOffset); | le32toh(desc_table->raidMapDescOffset)); | ||||
memcpy(pDrvRaidMap->ldSpanMap, fw_map_dyn->RaidMapDescPtrs.ptrStruct.ldSpanMap, | memcpy(pDrvRaidMap->ldSpanMap, fw_map_dyn->RaidMapDescPtrs.ptrStruct.ldSpanMap, | ||||
sizeof(MR_LD_SPAN_MAP) * desc_table->raidMapDescElements); | sizeof(MR_LD_SPAN_MAP) * | ||||
le32toh(desc_table->raidMapDescElements)); | |||||
#if VD_EXT_DEBUG | #if VD_EXT_DEBUG | ||||
device_printf(sc->mrsas_dev, | device_printf(sc->mrsas_dev, | ||||
"ldSpanMap address %p\n", fw_map_dyn->RaidMapDescPtrs.ptrStruct.ldSpanMap); | "ldSpanMap address %p\n", fw_map_dyn->RaidMapDescPtrs.ptrStruct.ldSpanMap); | ||||
device_printf(sc->mrsas_dev, | device_printf(sc->mrsas_dev, | ||||
"MR_LD_SPAN_MAP size 0x%lx\n", sizeof(MR_LD_SPAN_MAP)); | "MR_LD_SPAN_MAP size 0x%lx\n", sizeof(MR_LD_SPAN_MAP)); | ||||
for (j = 0; j < ld_count; j++) { | for (j = 0; j < ld_count; j++) { | ||||
printf("mrsas(%d) : fw_map_dyn->ldSpanMap[%d].ldRaid.targetId 0x%x " | printf("mrsas(%d) : fw_map_dyn->ldSpanMap[%d].ldRaid.targetId 0x%x " | ||||
"fw_map_dyn->ldSpanMap[%d].ldRaid.seqNum 0x%x size 0x%x\n", | "fw_map_dyn->ldSpanMap[%d].ldRaid.seqNum 0x%x size 0x%x\n", | ||||
Show All 35 Lines | MR_PopulateDrvRaidMap(struct mrsas_softc *sc) | ||||
MR_DRV_RAID_MAP_ALL *drv_map = sc->ld_drv_map[(sc->map_id & 1)]; | MR_DRV_RAID_MAP_ALL *drv_map = sc->ld_drv_map[(sc->map_id & 1)]; | ||||
MR_DRV_RAID_MAP *pDrvRaidMap = &drv_map->raidMap; | MR_DRV_RAID_MAP *pDrvRaidMap = &drv_map->raidMap; | ||||
if (sc->maxRaidMapSize) { | if (sc->maxRaidMapSize) { | ||||
return MR_PopulateDrvRaidMapVentura(sc); | return MR_PopulateDrvRaidMapVentura(sc); | ||||
} else if (sc->max256vdSupport) { | } else if (sc->max256vdSupport) { | ||||
fw_map_ext = (MR_FW_RAID_MAP_EXT *) sc->raidmap_mem[(sc->map_id & 1)]; | fw_map_ext = (MR_FW_RAID_MAP_EXT *) sc->raidmap_mem[(sc->map_id & 1)]; | ||||
ld_count = (u_int16_t)(fw_map_ext->ldCount); | ld_count = (u_int16_t)le16toh(fw_map_ext->ldCount); | ||||
if (ld_count > MAX_LOGICAL_DRIVES_EXT) { | if (ld_count > MAX_LOGICAL_DRIVES_EXT) { | ||||
device_printf(sc->mrsas_dev, | device_printf(sc->mrsas_dev, | ||||
"mrsas: LD count exposed in RAID map in not valid\n"); | "mrsas: LD count exposed in RAID map in not valid\n"); | ||||
return 1; | return 1; | ||||
} | } | ||||
#if VD_EXT_DEBUG | #if VD_EXT_DEBUG | ||||
for (i = 0; i < ld_count; i++) { | for (i = 0; i < ld_count; i++) { | ||||
printf("mrsas : Index 0x%x Target Id 0x%x Seq Num 0x%x Size 0/%lx\n", | printf("mrsas : Index 0x%x Target Id 0x%x Seq Num 0x%x Size 0/%lx\n", | ||||
i, fw_map_ext->ldSpanMap[i].ldRaid.targetId, | i, fw_map_ext->ldSpanMap[i].ldRaid.targetId, | ||||
fw_map_ext->ldSpanMap[i].ldRaid.seqNum, | fw_map_ext->ldSpanMap[i].ldRaid.seqNum, | ||||
fw_map_ext->ldSpanMap[i].ldRaid.size); | fw_map_ext->ldSpanMap[i].ldRaid.size); | ||||
} | } | ||||
#endif | #endif | ||||
memset(drv_map, 0, sc->drv_map_sz); | memset(drv_map, 0, sc->drv_map_sz); | ||||
pDrvRaidMap->ldCount = ld_count; | pDrvRaidMap->ldCount = htole16(ld_count); | ||||
pDrvRaidMap->fpPdIoTimeoutSec = fw_map_ext->fpPdIoTimeoutSec; | pDrvRaidMap->fpPdIoTimeoutSec = fw_map_ext->fpPdIoTimeoutSec; | ||||
for (i = 0; i < (MAX_LOGICAL_DRIVES_EXT); i++) { | for (i = 0; i < (MAX_LOGICAL_DRIVES_EXT); i++) { | ||||
pDrvRaidMap->ldTgtIdToLd[i] = (u_int16_t)fw_map_ext->ldTgtIdToLd[i]; | pDrvRaidMap->ldTgtIdToLd[i] = (u_int16_t)fw_map_ext->ldTgtIdToLd[i]; | ||||
} | } | ||||
memcpy(pDrvRaidMap->ldSpanMap, fw_map_ext->ldSpanMap, sizeof(MR_LD_SPAN_MAP) * ld_count); | memcpy(pDrvRaidMap->ldSpanMap, fw_map_ext->ldSpanMap, sizeof(MR_LD_SPAN_MAP) * ld_count); | ||||
#if VD_EXT_DEBUG | #if VD_EXT_DEBUG | ||||
for (i = 0; i < ld_count; i++) { | for (i = 0; i < ld_count; i++) { | ||||
printf("mrsas(%d) : fw_map_ext->ldSpanMap[%d].ldRaid.targetId 0x%x " | printf("mrsas(%d) : fw_map_ext->ldSpanMap[%d].ldRaid.targetId 0x%x " | ||||
Show All 11 Lines | for (i = 0; i < ld_count; i++) { | ||||
&pDrvRaidMap->ldSpanMap[i].ldRaid); | &pDrvRaidMap->ldSpanMap[i].ldRaid); | ||||
} | } | ||||
#endif | #endif | ||||
memcpy(pDrvRaidMap->arMapInfo, fw_map_ext->arMapInfo, | memcpy(pDrvRaidMap->arMapInfo, fw_map_ext->arMapInfo, | ||||
sizeof(MR_ARRAY_INFO) * MAX_API_ARRAYS_EXT); | sizeof(MR_ARRAY_INFO) * MAX_API_ARRAYS_EXT); | ||||
memcpy(pDrvRaidMap->devHndlInfo, fw_map_ext->devHndlInfo, | memcpy(pDrvRaidMap->devHndlInfo, fw_map_ext->devHndlInfo, | ||||
sizeof(MR_DEV_HANDLE_INFO) * MAX_RAIDMAP_PHYSICAL_DEVICES); | sizeof(MR_DEV_HANDLE_INFO) * MAX_RAIDMAP_PHYSICAL_DEVICES); | ||||
pDrvRaidMap->totalSize = sizeof(MR_FW_RAID_MAP_EXT); | pDrvRaidMap->totalSize = htole32(sizeof(MR_FW_RAID_MAP_EXT)); | ||||
} else { | } else { | ||||
fw_map_old = (MR_FW_RAID_MAP_ALL *) sc->raidmap_mem[(sc->map_id & 1)]; | fw_map_old = (MR_FW_RAID_MAP_ALL *) sc->raidmap_mem[(sc->map_id & 1)]; | ||||
pFwRaidMap = &fw_map_old->raidMap; | pFwRaidMap = &fw_map_old->raidMap; | ||||
#if VD_EXT_DEBUG | #if VD_EXT_DEBUG | ||||
for (i = 0; i < pFwRaidMap->ldCount; i++) { | for (i = 0; i < le32toh(pFwRaidMap->ldCount); i++) { | ||||
device_printf(sc->mrsas_dev, | device_printf(sc->mrsas_dev, | ||||
"Index 0x%x Target Id 0x%x Seq Num 0x%x Size 0/%lx\n", i, | "Index 0x%x Target Id 0x%x Seq Num 0x%x Size 0/%lx\n", i, | ||||
fw_map_old->raidMap.ldSpanMap[i].ldRaid.targetId, | fw_map_old->raidMap.ldSpanMap[i].ldRaid.targetId, | ||||
fw_map_old->raidMap.ldSpanMap[i].ldRaid.seqNum, | fw_map_old->raidMap.ldSpanMap[i].ldRaid.seqNum, | ||||
fw_map_old->raidMap.ldSpanMap[i].ldRaid.size); | fw_map_old->raidMap.ldSpanMap[i].ldRaid.size); | ||||
} | } | ||||
#endif | #endif | ||||
▲ Show 20 Lines • Show All 65 Lines • ▼ Show 20 Lines | MR_ValidateMapInfo(struct mrsas_softc *sc) | ||||
if (sc->maxRaidMapSize) | if (sc->maxRaidMapSize) | ||||
expected_map_size = sizeof(MR_DRV_RAID_MAP_ALL); | expected_map_size = sizeof(MR_DRV_RAID_MAP_ALL); | ||||
else if (sc->max256vdSupport) | else if (sc->max256vdSupport) | ||||
expected_map_size = sizeof(MR_FW_RAID_MAP_EXT); | expected_map_size = sizeof(MR_FW_RAID_MAP_EXT); | ||||
else | else | ||||
expected_map_size = | expected_map_size = | ||||
(sizeof(MR_FW_RAID_MAP) - sizeof(MR_LD_SPAN_MAP)) + | (sizeof(MR_FW_RAID_MAP) - sizeof(MR_LD_SPAN_MAP)) + | ||||
(sizeof(MR_LD_SPAN_MAP) * pDrvRaidMap->ldCount); | (sizeof(MR_LD_SPAN_MAP) * le16toh(pDrvRaidMap->ldCount)); | ||||
if (pDrvRaidMap->totalSize != expected_map_size) { | if (le32toh(pDrvRaidMap->totalSize) != expected_map_size) { | ||||
device_printf(sc->mrsas_dev, "map size %x not matching ld count\n", expected_map_size); | device_printf(sc->mrsas_dev, "map size %x not matching ld count\n", expected_map_size); | ||||
device_printf(sc->mrsas_dev, "span map= %x\n", (unsigned int)sizeof(MR_LD_SPAN_MAP)); | device_printf(sc->mrsas_dev, "span map= %x\n", (unsigned int)sizeof(MR_LD_SPAN_MAP)); | ||||
device_printf(sc->mrsas_dev, "pDrvRaidMap->totalSize=%x\n", pDrvRaidMap->totalSize); | device_printf(sc->mrsas_dev, "pDrvRaidMap->totalSize=%x\n", le32toh(pDrvRaidMap->totalSize)); | ||||
return 1; | return 1; | ||||
} | } | ||||
if (sc->UnevenSpanSupport) { | if (sc->UnevenSpanSupport) { | ||||
mr_update_span_set(drv_map, ldSpanInfo); | mr_update_span_set(drv_map, ldSpanInfo); | ||||
} | } | ||||
mrsas_update_load_balance_params(sc, drv_map, sc->load_balance_info); | mrsas_update_load_balance_params(sc, drv_map, sc->load_balance_info); | ||||
return 0; | return 0; | ||||
Show All 25 Lines | for (ldCount = 0; ldCount < MAX_LOGICAL_DRIVES; ldCount++) { | ||||
ld = MR_TargetIdToLdGet(ldCount, map); | ld = MR_TargetIdToLdGet(ldCount, map); | ||||
if (ld >= MAX_LOGICAL_DRIVES) { | if (ld >= MAX_LOGICAL_DRIVES) { | ||||
continue; | continue; | ||||
} | } | ||||
raid = MR_LdRaidGet(ld, map); | raid = MR_LdRaidGet(ld, map); | ||||
printf("LD %x: span_depth=%x\n", ld, raid->spanDepth); | printf("LD %x: span_depth=%x\n", ld, raid->spanDepth); | ||||
for (span = 0; span < raid->spanDepth; span++) | for (span = 0; span < raid->spanDepth; span++) | ||||
printf("Span=%x, number of quads=%x\n", span, | printf("Span=%x, number of quads=%x\n", span, | ||||
map->raidMap.ldSpanMap[ld].spanBlock[span]. | le32toh(map->raidMap.ldSpanMap[ld].spanBlock[span]. | ||||
block_span_info.noElements); | block_span_info.noElements)); | ||||
for (element = 0; element < MAX_QUAD_DEPTH; element++) { | for (element = 0; element < MAX_QUAD_DEPTH; element++) { | ||||
span_set = &(ldSpanInfo[ld].span_set[element]); | span_set = &(ldSpanInfo[ld].span_set[element]); | ||||
if (span_set->span_row_data_width == 0) | if (span_set->span_row_data_width == 0) | ||||
break; | break; | ||||
printf("Span Set %x: width=%x, diff=%x\n", element, | printf("Span Set %x: width=%x, diff=%x\n", element, | ||||
(unsigned int)span_set->span_row_data_width, | (unsigned int)span_set->span_row_data_width, | ||||
(unsigned int)span_set->diff); | (unsigned int)span_set->diff); | ||||
Show All 12 Lines | for (element = 0; element < MAX_QUAD_DEPTH; element++) { | ||||
for (span = 0; span < raid->spanDepth; span++) { | for (span = 0; span < raid->spanDepth; span++) { | ||||
if (map->raidMap.ldSpanMap[ld].spanBlock[span]. | if (map->raidMap.ldSpanMap[ld].spanBlock[span]. | ||||
block_span_info.noElements >= element + 1) { | block_span_info.noElements >= element + 1) { | ||||
quad = &map->raidMap.ldSpanMap[ld]. | quad = &map->raidMap.ldSpanMap[ld]. | ||||
spanBlock[span].block_span_info. | spanBlock[span].block_span_info. | ||||
quad[element]; | quad[element]; | ||||
printf("Span=%x, Quad=%x, diff=%x\n", span, | printf("Span=%x, Quad=%x, diff=%x\n", span, | ||||
element, quad->diff); | element, le32toh(quad->diff)); | ||||
printf("offset_in_span=0x%08lx\n", | printf("offset_in_span=0x%08lx\n", | ||||
(long unsigned int)quad->offsetInSpan); | (long unsigned int)le64toh(quad->offsetInSpan)); | ||||
printf("logical start=0x%08lx, end=0x%08lx\n", | printf("logical start=0x%08lx, end=0x%08lx\n", | ||||
(long unsigned int)quad->logStart, | (long unsigned int)le64toh(quad->logStart), | ||||
(long unsigned int)quad->logEnd); | (long unsigned int)le64toh(quad->logEnd)); | ||||
} | } | ||||
} | } | ||||
} | } | ||||
} | } | ||||
return 0; | return 0; | ||||
} | } | ||||
#endif | #endif | ||||
Show All 25 Lines | for (info = 0; info < MAX_QUAD_DEPTH; info++) { | ||||
span_set = &(ldSpanInfo[ld].span_set[info]); | span_set = &(ldSpanInfo[ld].span_set[info]); | ||||
if (span_set->span_row_data_width == 0) | if (span_set->span_row_data_width == 0) | ||||
break; | break; | ||||
if (row > span_set->data_row_end) | if (row > span_set->data_row_end) | ||||
continue; | continue; | ||||
for (span = 0; span < raid->spanDepth; span++) | for (span = 0; span < raid->spanDepth; span++) | ||||
if (map->raidMap.ldSpanMap[ld].spanBlock[span]. | if (le32toh(map->raidMap.ldSpanMap[ld].spanBlock[span]. | ||||
block_span_info.noElements >= info + 1) { | block_span_info.noElements) >= info + 1) { | ||||
quad = &map->raidMap.ldSpanMap[ld]. | quad = &map->raidMap.ldSpanMap[ld]. | ||||
spanBlock[span]. | spanBlock[span]. | ||||
block_span_info.quad[info]; | block_span_info.quad[info]; | ||||
if (quad->diff == 0) { | if (quad->diff == 0) { | ||||
*div_error = 1; | *div_error = 1; | ||||
return span; | return span; | ||||
} | } | ||||
if (quad->logStart <= row && | if (le64toh(quad->logStart) <= row && | ||||
row <= quad->logEnd && | row <= le64toh(quad->logEnd) && | ||||
(mega_mod64(row - quad->logStart, | (mega_mod64(row - le64toh(quad->logStart), | ||||
quad->diff)) == 0) { | le32toh(quad->diff))) == 0) { | ||||
if (span_blk != NULL) { | if (span_blk != NULL) { | ||||
u_int64_t blk; | u_int64_t blk; | ||||
blk = mega_div64_32 | blk = mega_div64_32 | ||||
((row - quad->logStart), | ((row - le64toh(quad->logStart)), | ||||
quad->diff); | le32toh(quad->diff)); | ||||
blk = (blk + quad->offsetInSpan) | blk = (blk + le64toh(quad->offsetInSpan)) | ||||
<< raid->stripeShift; | << raid->stripeShift; | ||||
*span_blk = blk; | *span_blk = blk; | ||||
} | } | ||||
return span; | return span; | ||||
} | } | ||||
} | } | ||||
} | } | ||||
return SPAN_INVALID; | return SPAN_INVALID; | ||||
Show All 30 Lines | if (strip > span_set->data_strip_end) | ||||
continue; | continue; | ||||
span_set_Strip = strip - span_set->data_strip_start; | span_set_Strip = strip - span_set->data_strip_start; | ||||
strip_offset = mega_mod64(span_set_Strip, | strip_offset = mega_mod64(span_set_Strip, | ||||
span_set->span_row_data_width); | span_set->span_row_data_width); | ||||
span_set_Row = mega_div64_32(span_set_Strip, | span_set_Row = mega_div64_32(span_set_Strip, | ||||
span_set->span_row_data_width) * span_set->diff; | span_set->span_row_data_width) * span_set->diff; | ||||
for (span = 0, span_offset = 0; span < raid->spanDepth; span++) | for (span = 0, span_offset = 0; span < raid->spanDepth; span++) | ||||
if (map->raidMap.ldSpanMap[ld].spanBlock[span]. | if (le32toh(map->raidMap.ldSpanMap[ld].spanBlock[span]. | ||||
block_span_info.noElements >= info + 1) { | block_span_info.noElements) >= info + 1) { | ||||
if (strip_offset >= | if (strip_offset >= | ||||
span_set->strip_offset[span]) | span_set->strip_offset[span]) | ||||
span_offset++; | span_offset++; | ||||
else | else | ||||
break; | break; | ||||
} | } | ||||
mrsas_dprint(sc, MRSAS_PRL11, "AVAGO Debug : Strip 0x%llx, span_set_Strip 0x%llx, span_set_Row 0x%llx " | mrsas_dprint(sc, MRSAS_PRL11, "AVAGO Debug : Strip 0x%llx, span_set_Strip 0x%llx, span_set_Row 0x%llx " | ||||
"data width 0x%llx span offset 0x%llx\n", (unsigned long long)strip, | "data width 0x%llx span offset 0x%llx\n", (unsigned long long)strip, | ||||
Show All 35 Lines | for (info = 0; info < MAX_QUAD_DEPTH; info++) { | ||||
span_set = &(ldSpanInfo[ld].span_set[info]); | span_set = &(ldSpanInfo[ld].span_set[info]); | ||||
if (span_set->span_row_data_width == 0) | if (span_set->span_row_data_width == 0) | ||||
break; | break; | ||||
if (row > span_set->data_row_end) | if (row > span_set->data_row_end) | ||||
continue; | continue; | ||||
for (span = 0; span < raid->spanDepth; span++) | for (span = 0; span < raid->spanDepth; span++) | ||||
if (map->raidMap.ldSpanMap[ld].spanBlock[span]. | if (le32toh(map->raidMap.ldSpanMap[ld].spanBlock[span]. | ||||
block_span_info.noElements >= info + 1) { | block_span_info.noElements) >= info + 1) { | ||||
quad = &map->raidMap.ldSpanMap[ld]. | quad = &map->raidMap.ldSpanMap[ld]. | ||||
spanBlock[span].block_span_info.quad[info]; | spanBlock[span].block_span_info.quad[info]; | ||||
if (quad->logStart <= row && | if (le64toh(quad->logStart) <= row && | ||||
row <= quad->logEnd && | row <= le64toh(quad->logEnd) && | ||||
mega_mod64((row - quad->logStart), | mega_mod64((row - le64toh(quad->logStart)), | ||||
quad->diff) == 0) { | le32toh(quad->diff)) == 0) { | ||||
strip = mega_div64_32 | strip = mega_div64_32 | ||||
(((row - span_set->data_row_start) | (((row - span_set->data_row_start) | ||||
- quad->logStart), | - le64toh(quad->logStart)), | ||||
quad->diff); | le32toh(quad->diff)); | ||||
strip *= span_set->span_row_data_width; | strip *= span_set->span_row_data_width; | ||||
strip += span_set->data_strip_start; | strip += span_set->data_strip_start; | ||||
strip += span_set->strip_offset[span]; | strip += span_set->strip_offset[span]; | ||||
return strip; | return strip; | ||||
} | } | ||||
} | } | ||||
} | } | ||||
mrsas_dprint(sc, MRSAS_PRL11, "AVAGO Debug - get_strip_from_row: returns invalid " | mrsas_dprint(sc, MRSAS_PRL11, "AVAGO Debug - get_strip_from_row: returns invalid " | ||||
Show All 32 Lines | for (info = 0; info < MAX_QUAD_DEPTH; info++) { | ||||
if (strip > span_set->data_strip_end) | if (strip > span_set->data_strip_end) | ||||
continue; | continue; | ||||
strip_offset = (u_int32_t)mega_mod64 | strip_offset = (u_int32_t)mega_mod64 | ||||
((strip - span_set->data_strip_start), | ((strip - span_set->data_strip_start), | ||||
span_set->span_row_data_width); | span_set->span_row_data_width); | ||||
for (span = 0, span_offset = 0; span < raid->spanDepth; span++) | for (span = 0, span_offset = 0; span < raid->spanDepth; span++) | ||||
if (map->raidMap.ldSpanMap[ld].spanBlock[span]. | if (le32toh(map->raidMap.ldSpanMap[ld].spanBlock[span]. | ||||
block_span_info.noElements >= info + 1) { | block_span_info.noElements) >= info + 1) { | ||||
if (strip_offset >= span_set->strip_offset[span]) | if (strip_offset >= span_set->strip_offset[span]) | ||||
span_offset = span_set->strip_offset[span]; | span_offset = span_set->strip_offset[span]; | ||||
else | else | ||||
break; | break; | ||||
} | } | ||||
mrsas_dprint(sc, MRSAS_PRL11, "AVAGO PRL11: get_arm_from_strip: " | mrsas_dprint(sc, MRSAS_PRL11, "AVAGO PRL11: get_arm_from_strip: " | ||||
"for ld=0x%x strip=0x%lx arm is 0x%x\n", ld, | "for ld=0x%x strip=0x%lx arm is 0x%x\n", ld, | ||||
(long unsigned int)strip, (strip_offset - span_offset)); | (long unsigned int)strip, (strip_offset - span_offset)); | ||||
▲ Show 20 Lines • Show All 86 Lines • ▼ Show 20 Lines | if (pd != MR_PD_INVALID) { | ||||
*pPdInterface = MR_PdInterfaceTypeGet(pd, map); | *pPdInterface = MR_PdInterfaceTypeGet(pd, map); | ||||
/* get second pd also for raid 1/10 fast path writes */ | /* get second pd also for raid 1/10 fast path writes */ | ||||
if ((raid->level == 1) && !io_info->isRead) { | if ((raid->level == 1) && !io_info->isRead) { | ||||
r1_alt_pd = MR_ArPdGet(arRef, physArm + 1, map); | r1_alt_pd = MR_ArPdGet(arRef, physArm + 1, map); | ||||
if (r1_alt_pd != MR_PD_INVALID) | if (r1_alt_pd != MR_PD_INVALID) | ||||
io_info->r1_alt_dev_handle = MR_PdDevHandleGet(r1_alt_pd, map); | io_info->r1_alt_dev_handle = MR_PdDevHandleGet(r1_alt_pd, map); | ||||
} | } | ||||
} else { | } else { | ||||
*pDevHandle = MR_DEVHANDLE_INVALID; | *pDevHandle = htole16(MR_DEVHANDLE_INVALID); | ||||
if ((raid->level >= 5) && ((sc->device_id == MRSAS_TBOLT) || | if ((raid->level >= 5) && ((sc->device_id == MRSAS_TBOLT) || | ||||
(sc->mrsas_gen3_ctrl && | (sc->mrsas_gen3_ctrl && | ||||
raid->regTypeReqOnRead != REGION_TYPE_UNUSED))) | raid->regTypeReqOnRead != REGION_TYPE_UNUSED))) | ||||
pRAID_Context->regLockFlags = REGION_TYPE_EXCLUSIVE; | pRAID_Context->regLockFlags = REGION_TYPE_EXCLUSIVE; | ||||
else if (raid->level == 1) { | else if (raid->level == 1) { | ||||
pd = MR_ArPdGet(arRef, physArm + 1, map); | pd = MR_ArPdGet(arRef, physArm + 1, map); | ||||
if (pd != MR_PD_INVALID) { | if (pd != MR_PD_INVALID) { | ||||
*pDevHandle = MR_PdDevHandleGet(pd, map); | *pDevHandle = MR_PdDevHandleGet(pd, map); | ||||
*pPdInterface = MR_PdInterfaceTypeGet(pd, map); | *pPdInterface = MR_PdInterfaceTypeGet(pd, map); | ||||
} | } | ||||
} | } | ||||
} | } | ||||
*pdBlock += stripRef + MR_LdSpanPtrGet(ld, span, map)->startBlk; | *pdBlock += stripRef + le64toh(MR_LdSpanPtrGet(ld, span, map)->startBlk); | ||||
if (sc->is_ventura || sc->is_aero) { | if (sc->is_ventura || sc->is_aero) { | ||||
((RAID_CONTEXT_G35 *) pRAID_Context)->spanArm = | ((RAID_CONTEXT_G35 *) pRAID_Context)->spanArm = | ||||
(span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm; | (span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm; | ||||
io_info->span_arm = (span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm; | io_info->span_arm = (span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm; | ||||
} else { | } else { | ||||
pRAID_Context->spanArm = (span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm; | pRAID_Context->spanArm = (span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm; | ||||
io_info->span_arm = pRAID_Context->spanArm; | io_info->span_arm = pRAID_Context->spanArm; | ||||
} | } | ||||
▲ Show 20 Lines • Show All 164 Lines • ▼ Show 20 Lines | if (numRows > 2) | ||||
regSize += (numRows - 2) << raid->stripeShift; | regSize += (numRows - 2) << raid->stripeShift; | ||||
/* if IO ends within first strip of last row */ | /* if IO ends within first strip of last row */ | ||||
if (endStrip == get_strip_from_row(sc, ld, endRow, map)) | if (endStrip == get_strip_from_row(sc, ld, endRow, map)) | ||||
regSize += ref_in_end_stripe + 1; | regSize += ref_in_end_stripe + 1; | ||||
else | else | ||||
regSize += stripSize; | regSize += stripSize; | ||||
} | } | ||||
pRAID_Context->timeoutValue = map->raidMap.fpPdIoTimeoutSec; | pRAID_Context->timeoutValue = htole16(map->raidMap.fpPdIoTimeoutSec); | ||||
if (sc->mrsas_gen3_ctrl) | if (sc->mrsas_gen3_ctrl) | ||||
pRAID_Context->regLockFlags = (isRead) ? raid->regTypeReqOnRead : raid->regTypeReqOnWrite; | pRAID_Context->regLockFlags = (isRead) ? raid->regTypeReqOnRead : raid->regTypeReqOnWrite; | ||||
else if (sc->device_id == MRSAS_TBOLT) | else if (sc->device_id == MRSAS_TBOLT) | ||||
pRAID_Context->regLockFlags = (isRead) ? REGION_TYPE_SHARED_READ : raid->regTypeReqOnWrite; | pRAID_Context->regLockFlags = (isRead) ? REGION_TYPE_SHARED_READ : raid->regTypeReqOnWrite; | ||||
pRAID_Context->VirtualDiskTgtId = raid->targetId; | pRAID_Context->VirtualDiskTgtId = raid->targetId; | ||||
pRAID_Context->regLockRowLBA = regStart; | pRAID_Context->regLockRowLBA = htole64(regStart); | ||||
pRAID_Context->regLockLength = regSize; | pRAID_Context->regLockLength = htole32(regSize); | ||||
pRAID_Context->configSeqNum = raid->seqNum; | pRAID_Context->configSeqNum = raid->seqNum; | ||||
/* | /* | ||||
* Get Phy Params only if FP capable, or else leave it to MR firmware | * Get Phy Params only if FP capable, or else leave it to MR firmware | ||||
* to do the calculation. | * to do the calculation. | ||||
*/ | */ | ||||
if (io_info->fpOkForIo) { | if (io_info->fpOkForIo) { | ||||
retval = io_info->IoforUnevenSpan ? | retval = io_info->IoforUnevenSpan ? | ||||
▲ Show 20 Lines • Show All 56 Lines • ▼ Show 20 Lines | mr_update_span_set(MR_DRV_RAID_MAP_ALL * map, PLD_SPAN_INFO ldSpanInfo) | ||||
for (ldCount = 0; ldCount < MAX_LOGICAL_DRIVES; ldCount++) { | for (ldCount = 0; ldCount < MAX_LOGICAL_DRIVES; ldCount++) { | ||||
ld = MR_TargetIdToLdGet(ldCount, map); | ld = MR_TargetIdToLdGet(ldCount, map); | ||||
if (ld >= MAX_LOGICAL_DRIVES) | if (ld >= MAX_LOGICAL_DRIVES) | ||||
continue; | continue; | ||||
raid = MR_LdRaidGet(ld, map); | raid = MR_LdRaidGet(ld, map); | ||||
for (element = 0; element < MAX_QUAD_DEPTH; element++) { | for (element = 0; element < MAX_QUAD_DEPTH; element++) { | ||||
for (span = 0; span < raid->spanDepth; span++) { | for (span = 0; span < raid->spanDepth; span++) { | ||||
if (map->raidMap.ldSpanMap[ld].spanBlock[span]. | if (le32toh(map->raidMap.ldSpanMap[ld].spanBlock[span]. | ||||
block_span_info.noElements < element + 1) | block_span_info.noElements) < element + 1) | ||||
continue; | continue; | ||||
/* TO-DO */ | /* TO-DO */ | ||||
span_set = &(ldSpanInfo[ld].span_set[element]); | span_set = &(ldSpanInfo[ld].span_set[element]); | ||||
quad = &map->raidMap.ldSpanMap[ld]. | quad = &map->raidMap.ldSpanMap[ld]. | ||||
spanBlock[span].block_span_info.quad[element]; | spanBlock[span].block_span_info.quad[element]; | ||||
span_set->diff = quad->diff; | span_set->diff = le32toh(quad->diff); | ||||
for (count = 0, span_row_width = 0; | for (count = 0, span_row_width = 0; | ||||
count < raid->spanDepth; count++) { | count < raid->spanDepth; count++) { | ||||
if (map->raidMap.ldSpanMap[ld].spanBlock[count]. | if (le32toh(map->raidMap.ldSpanMap[ld].spanBlock[count]. | ||||
block_span_info.noElements >= element + 1) { | block_span_info.noElements) >= element + 1) { | ||||
span_set->strip_offset[count] = span_row_width; | span_set->strip_offset[count] = span_row_width; | ||||
span_row_width += | span_row_width += | ||||
MR_LdSpanPtrGet(ld, count, map)->spanRowDataSize; | MR_LdSpanPtrGet(ld, count, map)->spanRowDataSize; | ||||
#if SPAN_DEBUG | #if SPAN_DEBUG | ||||
printf("AVAGO Debug span %x rowDataSize %x\n", count, | printf("AVAGO Debug span %x rowDataSize %x\n", count, | ||||
MR_LdSpanPtrGet(ld, count, map)->spanRowDataSize); | MR_LdSpanPtrGet(ld, count, map)->spanRowDataSize); | ||||
#endif | #endif | ||||
} | } | ||||
} | } | ||||
span_set->span_row_data_width = span_row_width; | span_set->span_row_data_width = span_row_width; | ||||
span_row = mega_div64_32(((quad->logEnd - | span_row = mega_div64_32(((le64toh(quad->logEnd) - | ||||
quad->logStart) + quad->diff), quad->diff); | le64toh(quad->logStart)) + le32toh(quad->diff)), | ||||
le32toh(quad->diff)); | |||||
if (element == 0) { | if (element == 0) { | ||||
span_set->log_start_lba = 0; | span_set->log_start_lba = 0; | ||||
span_set->log_end_lba = | span_set->log_end_lba = | ||||
((span_row << raid->stripeShift) * span_row_width) - 1; | ((span_row << raid->stripeShift) * span_row_width) - 1; | ||||
span_set->span_row_start = 0; | span_set->span_row_start = 0; | ||||
span_set->span_row_end = span_row - 1; | span_set->span_row_end = span_row - 1; | ||||
span_set->data_strip_start = 0; | span_set->data_strip_start = 0; | ||||
span_set->data_strip_end = (span_row * span_row_width) - 1; | span_set->data_strip_end = (span_row * span_row_width) - 1; | ||||
span_set->data_row_start = 0; | span_set->data_row_start = 0; | ||||
span_set->data_row_end = (span_row * quad->diff) - 1; | span_set->data_row_end = | ||||
(span_row * le32toh(quad->diff)) - 1; | |||||
} else { | } else { | ||||
span_set_prev = &(ldSpanInfo[ld].span_set[element - 1]); | span_set_prev = &(ldSpanInfo[ld].span_set[element - 1]); | ||||
span_set->log_start_lba = span_set_prev->log_end_lba + 1; | span_set->log_start_lba = span_set_prev->log_end_lba + 1; | ||||
span_set->log_end_lba = span_set->log_start_lba + | span_set->log_end_lba = span_set->log_start_lba + | ||||
((span_row << raid->stripeShift) * span_row_width) - 1; | ((span_row << raid->stripeShift) * span_row_width) - 1; | ||||
span_set->span_row_start = span_set_prev->span_row_end + 1; | span_set->span_row_start = span_set_prev->span_row_end + 1; | ||||
span_set->span_row_end = | span_set->span_row_end = | ||||
span_set->span_row_start + span_row - 1; | span_set->span_row_start + span_row - 1; | ||||
span_set->data_strip_start = | span_set->data_strip_start = | ||||
span_set_prev->data_strip_end + 1; | span_set_prev->data_strip_end + 1; | ||||
span_set->data_strip_end = span_set->data_strip_start + | span_set->data_strip_end = span_set->data_strip_start + | ||||
(span_row * span_row_width) - 1; | (span_row * span_row_width) - 1; | ||||
span_set->data_row_start = span_set_prev->data_row_end + 1; | span_set->data_row_start = span_set_prev->data_row_end + 1; | ||||
span_set->data_row_end = span_set->data_row_start + | span_set->data_row_end = span_set->data_row_start + | ||||
(span_row * quad->diff) - 1; | (span_row * le32toh(quad->diff)) - 1; | ||||
} | } | ||||
break; | break; | ||||
} | } | ||||
if (span == raid->spanDepth) | if (span == raid->spanDepth) | ||||
break; /* no quads remain */ | break; /* no quads remain */ | ||||
} | } | ||||
} | } | ||||
#if SPAN_DEBUG | #if SPAN_DEBUG | ||||
Show All 24 Lines | mrsas_update_load_balance_params(struct mrsas_softc *sc, | ||||
for (ldCount = 0; ldCount < MAX_LOGICAL_DRIVES_EXT; ldCount++) { | for (ldCount = 0; ldCount < MAX_LOGICAL_DRIVES_EXT; ldCount++) { | ||||
ld = MR_TargetIdToLdGet(ldCount, drv_map); | ld = MR_TargetIdToLdGet(ldCount, drv_map); | ||||
if (ld >= MAX_LOGICAL_DRIVES_EXT) { | if (ld >= MAX_LOGICAL_DRIVES_EXT) { | ||||
lbInfo[ldCount].loadBalanceFlag = 0; | lbInfo[ldCount].loadBalanceFlag = 0; | ||||
continue; | continue; | ||||
} | } | ||||
raid = MR_LdRaidGet(ld, drv_map); | raid = MR_LdRaidGet(ld, drv_map); | ||||
le32_to_cpus(&raid->capability); | |||||
if ((raid->level != 1) || | if ((raid->level != 1) || | ||||
(raid->ldState != MR_LD_STATE_OPTIMAL)) { | (raid->ldState != MR_LD_STATE_OPTIMAL)) { | ||||
luporl: This comment should be removed. | |||||
lbInfo[ldCount].loadBalanceFlag = 0; | lbInfo[ldCount].loadBalanceFlag = 0; | ||||
continue; | continue; | ||||
} | } | ||||
lbInfo[ldCount].loadBalanceFlag = 1; | lbInfo[ldCount].loadBalanceFlag = 1; | ||||
} | } | ||||
} | } | ||||
/* | /* | ||||
▲ Show 20 Lines • Show All 41 Lines • ▼ Show 20 Lines | if (raid->capability.ldPiMode == MR_PROT_INFO_TYPE_CONTROLLER) { | ||||
cdb[14] = (u_int8_t)((start_blk >> 40) & 0xff); | cdb[14] = (u_int8_t)((start_blk >> 40) & 0xff); | ||||
cdb[15] = (u_int8_t)((start_blk >> 32) & 0xff); | cdb[15] = (u_int8_t)((start_blk >> 32) & 0xff); | ||||
cdb[16] = (u_int8_t)((start_blk >> 24) & 0xff); | cdb[16] = (u_int8_t)((start_blk >> 24) & 0xff); | ||||
cdb[17] = (u_int8_t)((start_blk >> 16) & 0xff); | cdb[17] = (u_int8_t)((start_blk >> 16) & 0xff); | ||||
cdb[18] = (u_int8_t)((start_blk >> 8) & 0xff); | cdb[18] = (u_int8_t)((start_blk >> 8) & 0xff); | ||||
cdb[19] = (u_int8_t)(start_blk & 0xff); | cdb[19] = (u_int8_t)(start_blk & 0xff); | ||||
/* Logical block reference tag */ | /* Logical block reference tag */ | ||||
io_request->CDB.EEDP32.PrimaryReferenceTag = swap32(ref_tag); | io_request->CDB.EEDP32.PrimaryReferenceTag = htobe32(ref_tag); | ||||
io_request->CDB.EEDP32.PrimaryApplicationTagMask = 0xffff; | io_request->CDB.EEDP32.PrimaryApplicationTagMask = htobe16(0xffff); | ||||
io_request->IoFlags = 32; /* Specify 32-byte cdb */ | io_request->IoFlags = htole16(32); /* Specify 32-byte cdb */ | ||||
/* Transfer length */ | /* Transfer length */ | ||||
cdb[28] = (u_int8_t)((num_blocks >> 24) & 0xff); | cdb[28] = (u_int8_t)((num_blocks >> 24) & 0xff); | ||||
cdb[29] = (u_int8_t)((num_blocks >> 16) & 0xff); | cdb[29] = (u_int8_t)((num_blocks >> 16) & 0xff); | ||||
cdb[30] = (u_int8_t)((num_blocks >> 8) & 0xff); | cdb[30] = (u_int8_t)((num_blocks >> 8) & 0xff); | ||||
cdb[31] = (u_int8_t)(num_blocks & 0xff); | cdb[31] = (u_int8_t)(num_blocks & 0xff); | ||||
/* set SCSI IO EEDP Flags */ | /* set SCSI IO EEDP Flags */ | ||||
if (ccb_h->flags == CAM_DIR_OUT) { | if (ccb_h->flags == CAM_DIR_OUT) { | ||||
io_request->EEDPFlags = | io_request->EEDPFlags = htole16( | ||||
MPI2_SCSIIO_EEDPFLAGS_INC_PRI_REFTAG | | MPI2_SCSIIO_EEDPFLAGS_INC_PRI_REFTAG | | ||||
MPI2_SCSIIO_EEDPFLAGS_CHECK_REFTAG | | MPI2_SCSIIO_EEDPFLAGS_CHECK_REFTAG | | ||||
MPI2_SCSIIO_EEDPFLAGS_CHECK_REMOVE_OP | | MPI2_SCSIIO_EEDPFLAGS_CHECK_REMOVE_OP | | ||||
MPI2_SCSIIO_EEDPFLAGS_CHECK_APPTAG | | MPI2_SCSIIO_EEDPFLAGS_CHECK_APPTAG | | ||||
MPI2_SCSIIO_EEDPFLAGS_CHECK_GUARD; | MPI2_SCSIIO_EEDPFLAGS_CHECK_GUARD); | ||||
} else { | } else { | ||||
io_request->EEDPFlags = | io_request->EEDPFlags = htole16( | ||||
MPI2_SCSIIO_EEDPFLAGS_INC_PRI_REFTAG | | MPI2_SCSIIO_EEDPFLAGS_INC_PRI_REFTAG | | ||||
MPI2_SCSIIO_EEDPFLAGS_INSERT_OP; | MPI2_SCSIIO_EEDPFLAGS_INSERT_OP); | ||||
} | } | ||||
io_request->Control |= (0x4 << 26); | io_request->Control |= htole32(0x4 << 26); | ||||
io_request->EEDPBlockSize = ld_block_size; | io_request->EEDPBlockSize = htole32(ld_block_size); | ||||
} else { | } else { | ||||
/* Some drives don't support 16/12 byte CDB's, convert to 10 */ | /* Some drives don't support 16/12 byte CDB's, convert to 10 */ | ||||
if (((cdb_len == 12) || (cdb_len == 16)) && | if (((cdb_len == 12) || (cdb_len == 16)) && | ||||
(start_blk <= 0xffffffff)) { | (start_blk <= 0xffffffff)) { | ||||
if (cdb_len == 16) { | if (cdb_len == 16) { | ||||
opcode = cdb[0] == READ_16 ? READ_10 : WRITE_10; | opcode = cdb[0] == READ_16 ? READ_10 : WRITE_10; | ||||
flagvals = cdb[1]; | flagvals = cdb[1]; | ||||
groupnum = cdb[14]; | groupnum = cdb[14]; | ||||
Show All 11 Lines | if (((cdb_len == 12) || (cdb_len == 16)) && | ||||
cdb[1] = flagvals; | cdb[1] = flagvals; | ||||
cdb[6] = groupnum; | cdb[6] = groupnum; | ||||
cdb[9] = control; | cdb[9] = control; | ||||
/* Transfer length */ | /* Transfer length */ | ||||
cdb[8] = (u_int8_t)(num_blocks & 0xff); | cdb[8] = (u_int8_t)(num_blocks & 0xff); | ||||
cdb[7] = (u_int8_t)((num_blocks >> 8) & 0xff); | cdb[7] = (u_int8_t)((num_blocks >> 8) & 0xff); | ||||
io_request->IoFlags = 10; /* Specify 10-byte cdb */ | io_request->IoFlags = htole16(10); /* Specify 10-byte cdb */ | ||||
cdb_len = 10; | cdb_len = 10; | ||||
} else if ((cdb_len < 16) && (start_blk > 0xffffffff)) { | } else if ((cdb_len < 16) && (start_blk > 0xffffffff)) { | ||||
/* Convert to 16 byte CDB for large LBA's */ | /* Convert to 16 byte CDB for large LBA's */ | ||||
switch (cdb_len) { | switch (cdb_len) { | ||||
case 6: | case 6: | ||||
opcode = cdb[0] == READ_6 ? READ_16 : WRITE_16; | opcode = cdb[0] == READ_6 ? READ_16 : WRITE_16; | ||||
control = cdb[5]; | control = cdb[5]; | ||||
break; | break; | ||||
Show All 19 Lines | if (((cdb_len == 12) || (cdb_len == 16)) && | ||||
cdb[15] = control; | cdb[15] = control; | ||||
/* Transfer length */ | /* Transfer length */ | ||||
cdb[13] = (u_int8_t)(num_blocks & 0xff); | cdb[13] = (u_int8_t)(num_blocks & 0xff); | ||||
cdb[12] = (u_int8_t)((num_blocks >> 8) & 0xff); | cdb[12] = (u_int8_t)((num_blocks >> 8) & 0xff); | ||||
cdb[11] = (u_int8_t)((num_blocks >> 16) & 0xff); | cdb[11] = (u_int8_t)((num_blocks >> 16) & 0xff); | ||||
cdb[10] = (u_int8_t)((num_blocks >> 24) & 0xff); | cdb[10] = (u_int8_t)((num_blocks >> 24) & 0xff); | ||||
io_request->IoFlags = 16; /* Specify 16-byte cdb */ | io_request->IoFlags = htole16(16); /* Specify 16-byte cdb */ | ||||
cdb_len = 16; | cdb_len = 16; | ||||
} else if ((cdb_len == 6) && (start_blk > 0x1fffff)) { | } else if ((cdb_len == 6) && (start_blk > 0x1fffff)) { | ||||
/* convert to 10 byte CDB */ | /* convert to 10 byte CDB */ | ||||
opcode = cdb[0] == READ_6 ? READ_10 : WRITE_10; | opcode = cdb[0] == READ_6 ? READ_10 : WRITE_10; | ||||
control = cdb[5]; | control = cdb[5]; | ||||
memset(cdb, 0, sizeof(io_request->CDB.CDB32)); | memset(cdb, 0, sizeof(io_request->CDB.CDB32)); | ||||
cdb[0] = opcode; | cdb[0] = opcode; | ||||
▲ Show 20 Lines • Show All 205 Lines • ▼ Show 20 Lines | if (pd != MR_PD_INVALID) { | ||||
*pPdInterface = MR_PdInterfaceTypeGet(pd, map); | *pPdInterface = MR_PdInterfaceTypeGet(pd, map); | ||||
/* get second pd also for raid 1/10 fast path writes */ | /* get second pd also for raid 1/10 fast path writes */ | ||||
if ((raid->level == 1) && !io_info->isRead) { | if ((raid->level == 1) && !io_info->isRead) { | ||||
r1_alt_pd = MR_ArPdGet(arRef, physArm + 1, map); | r1_alt_pd = MR_ArPdGet(arRef, physArm + 1, map); | ||||
if (r1_alt_pd != MR_PD_INVALID) | if (r1_alt_pd != MR_PD_INVALID) | ||||
io_info->r1_alt_dev_handle = MR_PdDevHandleGet(r1_alt_pd, map); | io_info->r1_alt_dev_handle = MR_PdDevHandleGet(r1_alt_pd, map); | ||||
} | } | ||||
} else { | } else { | ||||
*pDevHandle = MR_DEVHANDLE_INVALID; /* set dev handle as invalid. */ | *pDevHandle = htole16(MR_DEVHANDLE_INVALID); /* set dev handle as invalid. */ | ||||
if ((raid->level >= 5) && ((sc->device_id == MRSAS_TBOLT) || | if ((raid->level >= 5) && ((sc->device_id == MRSAS_TBOLT) || | ||||
(sc->mrsas_gen3_ctrl && | (sc->mrsas_gen3_ctrl && | ||||
raid->regTypeReqOnRead != REGION_TYPE_UNUSED))) | raid->regTypeReqOnRead != REGION_TYPE_UNUSED))) | ||||
pRAID_Context->regLockFlags = REGION_TYPE_EXCLUSIVE; | pRAID_Context->regLockFlags = REGION_TYPE_EXCLUSIVE; | ||||
else if (raid->level == 1) { | else if (raid->level == 1) { | ||||
/* Get Alternate Pd. */ | /* Get Alternate Pd. */ | ||||
pd = MR_ArPdGet(arRef, physArm + 1, map); | pd = MR_ArPdGet(arRef, physArm + 1, map); | ||||
if (pd != MR_PD_INVALID) { | if (pd != MR_PD_INVALID) { | ||||
/* Get dev handle from Pd. */ | /* Get dev handle from Pd. */ | ||||
*pDevHandle = MR_PdDevHandleGet(pd, map); | *pDevHandle = MR_PdDevHandleGet(pd, map); | ||||
*pPdInterface = MR_PdInterfaceTypeGet(pd, map); | *pPdInterface = MR_PdInterfaceTypeGet(pd, map); | ||||
} | } | ||||
} | } | ||||
} | } | ||||
*pdBlock += stripRef + MR_LdSpanPtrGet(ld, span, map)->startBlk; | *pdBlock += stripRef + le64toh(MR_LdSpanPtrGet(ld, span, map)->startBlk); | ||||
if (sc->is_ventura || sc->is_aero) { | if (sc->is_ventura || sc->is_aero) { | ||||
((RAID_CONTEXT_G35 *) pRAID_Context)->spanArm = | ((RAID_CONTEXT_G35 *) pRAID_Context)->spanArm = | ||||
(span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm; | (span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm; | ||||
io_info->span_arm = (span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm; | io_info->span_arm = (span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm; | ||||
} else { | } else { | ||||
pRAID_Context->spanArm = (span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm; | pRAID_Context->spanArm = (span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm; | ||||
io_info->span_arm = pRAID_Context->spanArm; | io_info->span_arm = pRAID_Context->spanArm; | ||||
} | } | ||||
▲ Show 20 Lines • Show All 45 Lines • Show Last 20 Lines |
This comment should be removed.