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lib/libc/arm/string/memmove.S
Show First 20 Lines • Show All 168 Lines • ▼ Show 20 Lines | .Lmemmove_fsrcul: | ||||
bgt .Lmemmove_fsrcul3 | bgt .Lmemmove_fsrcul3 | ||||
beq .Lmemmove_fsrcul2 | beq .Lmemmove_fsrcul2 | ||||
cmp r2, #0x0c | cmp r2, #0x0c | ||||
blt .Lmemmove_fsrcul1loop4 | blt .Lmemmove_fsrcul1loop4 | ||||
sub r2, r2, #0x0c | sub r2, r2, #0x0c | ||||
stmdb sp!, {r4, r5} | stmdb sp!, {r4, r5} | ||||
.Lmemmove_fsrcul1loop16: | .Lmemmove_fsrcul1loop16: | ||||
#ifdef __ARMEB__ | |||||
mov r3, lr, lsl #8 | |||||
#else | |||||
mov r3, lr, lsr #8 | mov r3, lr, lsr #8 | ||||
#endif | |||||
ldmia r1!, {r4, r5, r12, lr} | ldmia r1!, {r4, r5, r12, lr} | ||||
#ifdef __ARMEB__ | |||||
orr r3, r3, r4, lsr #24 | |||||
mov r4, r4, lsl #8 | |||||
orr r4, r4, r5, lsr #24 | |||||
mov r5, r5, lsl #8 | |||||
orr r5, r5, r12, lsr #24 | |||||
mov r12, r12, lsl #8 | |||||
orr r12, r12, lr, lsr #24 | |||||
#else | |||||
orr r3, r3, r4, lsl #24 | orr r3, r3, r4, lsl #24 | ||||
mov r4, r4, lsr #8 | mov r4, r4, lsr #8 | ||||
orr r4, r4, r5, lsl #24 | orr r4, r4, r5, lsl #24 | ||||
mov r5, r5, lsr #8 | mov r5, r5, lsr #8 | ||||
orr r5, r5, r12, lsl #24 | orr r5, r5, r12, lsl #24 | ||||
mov r12, r12, lsr #8 | mov r12, r12, lsr #8 | ||||
orr r12, r12, lr, lsl #24 | orr r12, r12, lr, lsl #24 | ||||
#endif | |||||
stmia r0!, {r3-r5, r12} | stmia r0!, {r3-r5, r12} | ||||
subs r2, r2, #0x10 | subs r2, r2, #0x10 | ||||
bge .Lmemmove_fsrcul1loop16 | bge .Lmemmove_fsrcul1loop16 | ||||
ldmia sp!, {r4, r5} | ldmia sp!, {r4, r5} | ||||
adds r2, r2, #0x0c | adds r2, r2, #0x0c | ||||
blt .Lmemmove_fsrcul1l4 | blt .Lmemmove_fsrcul1l4 | ||||
.Lmemmove_fsrcul1loop4: | .Lmemmove_fsrcul1loop4: | ||||
#ifdef __ARMEB__ | |||||
mov r12, lr, lsl #8 | |||||
#else | |||||
mov r12, lr, lsr #8 | mov r12, lr, lsr #8 | ||||
#endif | |||||
ldr lr, [r1], #4 | ldr lr, [r1], #4 | ||||
#ifdef __ARMEB__ | |||||
orr r12, r12, lr, lsr #24 | |||||
#else | |||||
orr r12, r12, lr, lsl #24 | orr r12, r12, lr, lsl #24 | ||||
#endif | |||||
str r12, [r0], #4 | str r12, [r0], #4 | ||||
subs r2, r2, #4 | subs r2, r2, #4 | ||||
bge .Lmemmove_fsrcul1loop4 | bge .Lmemmove_fsrcul1loop4 | ||||
.Lmemmove_fsrcul1l4: | .Lmemmove_fsrcul1l4: | ||||
sub r1, r1, #3 | sub r1, r1, #3 | ||||
b .Lmemmove_fl4 | b .Lmemmove_fl4 | ||||
.Lmemmove_fsrcul2: | .Lmemmove_fsrcul2: | ||||
cmp r2, #0x0c | cmp r2, #0x0c | ||||
blt .Lmemmove_fsrcul2loop4 | blt .Lmemmove_fsrcul2loop4 | ||||
sub r2, r2, #0x0c | sub r2, r2, #0x0c | ||||
stmdb sp!, {r4, r5} | stmdb sp!, {r4, r5} | ||||
.Lmemmove_fsrcul2loop16: | .Lmemmove_fsrcul2loop16: | ||||
#ifdef __ARMEB__ | |||||
mov r3, lr, lsl #16 | |||||
#else | |||||
mov r3, lr, lsr #16 | mov r3, lr, lsr #16 | ||||
#endif | |||||
ldmia r1!, {r4, r5, r12, lr} | ldmia r1!, {r4, r5, r12, lr} | ||||
#ifdef __ARMEB__ | |||||
orr r3, r3, r4, lsr #16 | |||||
mov r4, r4, lsl #16 | |||||
orr r4, r4, r5, lsr #16 | |||||
mov r5, r5, lsl #16 | |||||
orr r5, r5, r12, lsr #16 | |||||
mov r12, r12, lsl #16 | |||||
orr r12, r12, lr, lsr #16 | |||||
#else | |||||
orr r3, r3, r4, lsl #16 | orr r3, r3, r4, lsl #16 | ||||
mov r4, r4, lsr #16 | mov r4, r4, lsr #16 | ||||
orr r4, r4, r5, lsl #16 | orr r4, r4, r5, lsl #16 | ||||
mov r5, r5, lsr #16 | mov r5, r5, lsr #16 | ||||
orr r5, r5, r12, lsl #16 | orr r5, r5, r12, lsl #16 | ||||
mov r12, r12, lsr #16 | mov r12, r12, lsr #16 | ||||
orr r12, r12, lr, lsl #16 | orr r12, r12, lr, lsl #16 | ||||
#endif | |||||
stmia r0!, {r3-r5, r12} | stmia r0!, {r3-r5, r12} | ||||
subs r2, r2, #0x10 | subs r2, r2, #0x10 | ||||
bge .Lmemmove_fsrcul2loop16 | bge .Lmemmove_fsrcul2loop16 | ||||
ldmia sp!, {r4, r5} | ldmia sp!, {r4, r5} | ||||
adds r2, r2, #0x0c | adds r2, r2, #0x0c | ||||
blt .Lmemmove_fsrcul2l4 | blt .Lmemmove_fsrcul2l4 | ||||
.Lmemmove_fsrcul2loop4: | .Lmemmove_fsrcul2loop4: | ||||
#ifdef __ARMEB__ | |||||
mov r12, lr, lsl #16 | |||||
#else | |||||
mov r12, lr, lsr #16 | mov r12, lr, lsr #16 | ||||
#endif | |||||
ldr lr, [r1], #4 | ldr lr, [r1], #4 | ||||
#ifdef __ARMEB__ | |||||
orr r12, r12, lr, lsr #16 | |||||
#else | |||||
orr r12, r12, lr, lsl #16 | orr r12, r12, lr, lsl #16 | ||||
#endif | |||||
str r12, [r0], #4 | str r12, [r0], #4 | ||||
subs r2, r2, #4 | subs r2, r2, #4 | ||||
bge .Lmemmove_fsrcul2loop4 | bge .Lmemmove_fsrcul2loop4 | ||||
.Lmemmove_fsrcul2l4: | .Lmemmove_fsrcul2l4: | ||||
sub r1, r1, #2 | sub r1, r1, #2 | ||||
b .Lmemmove_fl4 | b .Lmemmove_fl4 | ||||
.Lmemmove_fsrcul3: | .Lmemmove_fsrcul3: | ||||
cmp r2, #0x0c | cmp r2, #0x0c | ||||
blt .Lmemmove_fsrcul3loop4 | blt .Lmemmove_fsrcul3loop4 | ||||
sub r2, r2, #0x0c | sub r2, r2, #0x0c | ||||
stmdb sp!, {r4, r5} | stmdb sp!, {r4, r5} | ||||
.Lmemmove_fsrcul3loop16: | .Lmemmove_fsrcul3loop16: | ||||
#ifdef __ARMEB__ | |||||
mov r3, lr, lsl #24 | |||||
#else | |||||
mov r3, lr, lsr #24 | mov r3, lr, lsr #24 | ||||
#endif | |||||
ldmia r1!, {r4, r5, r12, lr} | ldmia r1!, {r4, r5, r12, lr} | ||||
#ifdef __ARMEB__ | |||||
orr r3, r3, r4, lsr #8 | |||||
mov r4, r4, lsl #24 | |||||
orr r4, r4, r5, lsr #8 | |||||
mov r5, r5, lsl #24 | |||||
orr r5, r5, r12, lsr #8 | |||||
mov r12, r12, lsl #24 | |||||
orr r12, r12, lr, lsr #8 | |||||
#else | |||||
orr r3, r3, r4, lsl #8 | orr r3, r3, r4, lsl #8 | ||||
mov r4, r4, lsr #24 | mov r4, r4, lsr #24 | ||||
orr r4, r4, r5, lsl #8 | orr r4, r4, r5, lsl #8 | ||||
mov r5, r5, lsr #24 | mov r5, r5, lsr #24 | ||||
orr r5, r5, r12, lsl #8 | orr r5, r5, r12, lsl #8 | ||||
mov r12, r12, lsr #24 | mov r12, r12, lsr #24 | ||||
orr r12, r12, lr, lsl #8 | orr r12, r12, lr, lsl #8 | ||||
#endif | |||||
stmia r0!, {r3-r5, r12} | stmia r0!, {r3-r5, r12} | ||||
subs r2, r2, #0x10 | subs r2, r2, #0x10 | ||||
bge .Lmemmove_fsrcul3loop16 | bge .Lmemmove_fsrcul3loop16 | ||||
ldmia sp!, {r4, r5} | ldmia sp!, {r4, r5} | ||||
adds r2, r2, #0x0c | adds r2, r2, #0x0c | ||||
blt .Lmemmove_fsrcul3l4 | blt .Lmemmove_fsrcul3l4 | ||||
.Lmemmove_fsrcul3loop4: | .Lmemmove_fsrcul3loop4: | ||||
#ifdef __ARMEB__ | |||||
mov r12, lr, lsl #24 | |||||
#else | |||||
mov r12, lr, lsr #24 | mov r12, lr, lsr #24 | ||||
#endif | |||||
ldr lr, [r1], #4 | ldr lr, [r1], #4 | ||||
#ifdef __ARMEB__ | |||||
orr r12, r12, lr, lsr #8 | |||||
#else | |||||
orr r12, r12, lr, lsl #8 | orr r12, r12, lr, lsl #8 | ||||
#endif | |||||
str r12, [r0], #4 | str r12, [r0], #4 | ||||
subs r2, r2, #4 | subs r2, r2, #4 | ||||
bge .Lmemmove_fsrcul3loop4 | bge .Lmemmove_fsrcul3loop4 | ||||
.Lmemmove_fsrcul3l4: | .Lmemmove_fsrcul3l4: | ||||
sub r1, r1, #1 | sub r1, r1, #1 | ||||
b .Lmemmove_fl4 | b .Lmemmove_fl4 | ||||
▲ Show 20 Lines • Show All 95 Lines • ▼ Show 20 Lines | .Lmemmove_bsrcul: | ||||
blt .Lmemmove_bsrcul1 | blt .Lmemmove_bsrcul1 | ||||
beq .Lmemmove_bsrcul2 | beq .Lmemmove_bsrcul2 | ||||
cmp r2, #0x0c | cmp r2, #0x0c | ||||
blt .Lmemmove_bsrcul3loop4 | blt .Lmemmove_bsrcul3loop4 | ||||
sub r2, r2, #0x0c | sub r2, r2, #0x0c | ||||
stmdb sp!, {r4, r5, lr} | stmdb sp!, {r4, r5, lr} | ||||
.Lmemmove_bsrcul3loop16: | .Lmemmove_bsrcul3loop16: | ||||
#ifdef __ARMEB__ | |||||
mov lr, r3, lsr #8 | |||||
#else | |||||
mov lr, r3, lsl #8 | mov lr, r3, lsl #8 | ||||
#endif | |||||
ldmdb r1!, {r3-r5, r12} | ldmdb r1!, {r3-r5, r12} | ||||
#ifdef __ARMEB__ | |||||
orr lr, lr, r12, lsl #24 | |||||
mov r12, r12, lsr #8 | |||||
orr r12, r12, r5, lsl #24 | |||||
mov r5, r5, lsr #8 | |||||
orr r5, r5, r4, lsl #24 | |||||
mov r4, r4, lsr #8 | |||||
orr r4, r4, r3, lsl #24 | |||||
#else | |||||
orr lr, lr, r12, lsr #24 | orr lr, lr, r12, lsr #24 | ||||
mov r12, r12, lsl #8 | mov r12, r12, lsl #8 | ||||
orr r12, r12, r5, lsr #24 | orr r12, r12, r5, lsr #24 | ||||
mov r5, r5, lsl #8 | mov r5, r5, lsl #8 | ||||
orr r5, r5, r4, lsr #24 | orr r5, r5, r4, lsr #24 | ||||
mov r4, r4, lsl #8 | mov r4, r4, lsl #8 | ||||
orr r4, r4, r3, lsr #24 | orr r4, r4, r3, lsr #24 | ||||
#endif | |||||
stmdb r0!, {r4, r5, r12, lr} | stmdb r0!, {r4, r5, r12, lr} | ||||
subs r2, r2, #0x10 | subs r2, r2, #0x10 | ||||
bge .Lmemmove_bsrcul3loop16 | bge .Lmemmove_bsrcul3loop16 | ||||
ldmia sp!, {r4, r5, lr} | ldmia sp!, {r4, r5, lr} | ||||
adds r2, r2, #0x0c | adds r2, r2, #0x0c | ||||
blt .Lmemmove_bsrcul3l4 | blt .Lmemmove_bsrcul3l4 | ||||
.Lmemmove_bsrcul3loop4: | .Lmemmove_bsrcul3loop4: | ||||
#ifdef __ARMEB__ | |||||
mov r12, r3, lsr #8 | |||||
#else | |||||
mov r12, r3, lsl #8 | mov r12, r3, lsl #8 | ||||
#endif | |||||
ldr r3, [r1, #-4]! | ldr r3, [r1, #-4]! | ||||
#ifdef __ARMEB__ | |||||
orr r12, r12, r3, lsl #24 | |||||
#else | |||||
orr r12, r12, r3, lsr #24 | orr r12, r12, r3, lsr #24 | ||||
#endif | |||||
str r12, [r0, #-4]! | str r12, [r0, #-4]! | ||||
subs r2, r2, #4 | subs r2, r2, #4 | ||||
bge .Lmemmove_bsrcul3loop4 | bge .Lmemmove_bsrcul3loop4 | ||||
.Lmemmove_bsrcul3l4: | .Lmemmove_bsrcul3l4: | ||||
add r1, r1, #3 | add r1, r1, #3 | ||||
b .Lmemmove_bl4 | b .Lmemmove_bl4 | ||||
.Lmemmove_bsrcul2: | .Lmemmove_bsrcul2: | ||||
cmp r2, #0x0c | cmp r2, #0x0c | ||||
blt .Lmemmove_bsrcul2loop4 | blt .Lmemmove_bsrcul2loop4 | ||||
sub r2, r2, #0x0c | sub r2, r2, #0x0c | ||||
stmdb sp!, {r4, r5, lr} | stmdb sp!, {r4, r5, lr} | ||||
.Lmemmove_bsrcul2loop16: | .Lmemmove_bsrcul2loop16: | ||||
#ifdef __ARMEB__ | |||||
mov lr, r3, lsr #16 | |||||
#else | |||||
mov lr, r3, lsl #16 | mov lr, r3, lsl #16 | ||||
#endif | |||||
ldmdb r1!, {r3-r5, r12} | ldmdb r1!, {r3-r5, r12} | ||||
#ifdef __ARMEB__ | |||||
orr lr, lr, r12, lsl #16 | |||||
mov r12, r12, lsr #16 | |||||
orr r12, r12, r5, lsl #16 | |||||
mov r5, r5, lsr #16 | |||||
orr r5, r5, r4, lsl #16 | |||||
mov r4, r4, lsr #16 | |||||
orr r4, r4, r3, lsl #16 | |||||
#else | |||||
orr lr, lr, r12, lsr #16 | orr lr, lr, r12, lsr #16 | ||||
mov r12, r12, lsl #16 | mov r12, r12, lsl #16 | ||||
orr r12, r12, r5, lsr #16 | orr r12, r12, r5, lsr #16 | ||||
mov r5, r5, lsl #16 | mov r5, r5, lsl #16 | ||||
orr r5, r5, r4, lsr #16 | orr r5, r5, r4, lsr #16 | ||||
mov r4, r4, lsl #16 | mov r4, r4, lsl #16 | ||||
orr r4, r4, r3, lsr #16 | orr r4, r4, r3, lsr #16 | ||||
#endif | |||||
stmdb r0!, {r4, r5, r12, lr} | stmdb r0!, {r4, r5, r12, lr} | ||||
subs r2, r2, #0x10 | subs r2, r2, #0x10 | ||||
bge .Lmemmove_bsrcul2loop16 | bge .Lmemmove_bsrcul2loop16 | ||||
ldmia sp!, {r4, r5, lr} | ldmia sp!, {r4, r5, lr} | ||||
adds r2, r2, #0x0c | adds r2, r2, #0x0c | ||||
blt .Lmemmove_bsrcul2l4 | blt .Lmemmove_bsrcul2l4 | ||||
.Lmemmove_bsrcul2loop4: | .Lmemmove_bsrcul2loop4: | ||||
#ifdef __ARMEB__ | |||||
mov r12, r3, lsr #16 | |||||
#else | |||||
mov r12, r3, lsl #16 | mov r12, r3, lsl #16 | ||||
#endif | |||||
ldr r3, [r1, #-4]! | ldr r3, [r1, #-4]! | ||||
#ifdef __ARMEB__ | |||||
orr r12, r12, r3, lsl #16 | |||||
#else | |||||
orr r12, r12, r3, lsr #16 | orr r12, r12, r3, lsr #16 | ||||
#endif | |||||
str r12, [r0, #-4]! | str r12, [r0, #-4]! | ||||
subs r2, r2, #4 | subs r2, r2, #4 | ||||
bge .Lmemmove_bsrcul2loop4 | bge .Lmemmove_bsrcul2loop4 | ||||
.Lmemmove_bsrcul2l4: | .Lmemmove_bsrcul2l4: | ||||
add r1, r1, #2 | add r1, r1, #2 | ||||
b .Lmemmove_bl4 | b .Lmemmove_bl4 | ||||
.Lmemmove_bsrcul1: | .Lmemmove_bsrcul1: | ||||
cmp r2, #0x0c | cmp r2, #0x0c | ||||
blt .Lmemmove_bsrcul1loop4 | blt .Lmemmove_bsrcul1loop4 | ||||
sub r2, r2, #0x0c | sub r2, r2, #0x0c | ||||
stmdb sp!, {r4, r5, lr} | stmdb sp!, {r4, r5, lr} | ||||
.Lmemmove_bsrcul1loop32: | .Lmemmove_bsrcul1loop32: | ||||
#ifdef __ARMEB__ | |||||
mov lr, r3, lsr #24 | |||||
#else | |||||
mov lr, r3, lsl #24 | mov lr, r3, lsl #24 | ||||
#endif | |||||
ldmdb r1!, {r3-r5, r12} | ldmdb r1!, {r3-r5, r12} | ||||
#ifdef __ARMEB__ | |||||
orr lr, lr, r12, lsl #8 | |||||
mov r12, r12, lsr #24 | |||||
orr r12, r12, r5, lsl #8 | |||||
mov r5, r5, lsr #24 | |||||
orr r5, r5, r4, lsl #8 | |||||
mov r4, r4, lsr #24 | |||||
orr r4, r4, r3, lsl #8 | |||||
#else | |||||
orr lr, lr, r12, lsr #8 | orr lr, lr, r12, lsr #8 | ||||
mov r12, r12, lsl #24 | mov r12, r12, lsl #24 | ||||
orr r12, r12, r5, lsr #8 | orr r12, r12, r5, lsr #8 | ||||
mov r5, r5, lsl #24 | mov r5, r5, lsl #24 | ||||
orr r5, r5, r4, lsr #8 | orr r5, r5, r4, lsr #8 | ||||
mov r4, r4, lsl #24 | mov r4, r4, lsl #24 | ||||
orr r4, r4, r3, lsr #8 | orr r4, r4, r3, lsr #8 | ||||
#endif | |||||
stmdb r0!, {r4, r5, r12, lr} | stmdb r0!, {r4, r5, r12, lr} | ||||
subs r2, r2, #0x10 | subs r2, r2, #0x10 | ||||
bge .Lmemmove_bsrcul1loop32 | bge .Lmemmove_bsrcul1loop32 | ||||
ldmia sp!, {r4, r5, lr} | ldmia sp!, {r4, r5, lr} | ||||
adds r2, r2, #0x0c | adds r2, r2, #0x0c | ||||
blt .Lmemmove_bsrcul1l4 | blt .Lmemmove_bsrcul1l4 | ||||
.Lmemmove_bsrcul1loop4: | .Lmemmove_bsrcul1loop4: | ||||
#ifdef __ARMEB__ | |||||
mov r12, r3, lsr #24 | |||||
#else | |||||
mov r12, r3, lsl #24 | mov r12, r3, lsl #24 | ||||
#endif | |||||
ldr r3, [r1, #-4]! | ldr r3, [r1, #-4]! | ||||
#ifdef __ARMEB__ | |||||
orr r12, r12, r3, lsl #8 | |||||
#else | |||||
orr r12, r12, r3, lsr #8 | orr r12, r12, r3, lsr #8 | ||||
#endif | |||||
str r12, [r0, #-4]! | str r12, [r0, #-4]! | ||||
subs r2, r2, #4 | subs r2, r2, #4 | ||||
bge .Lmemmove_bsrcul1loop4 | bge .Lmemmove_bsrcul1loop4 | ||||
.Lmemmove_bsrcul1l4: | .Lmemmove_bsrcul1l4: | ||||
add r1, r1, #1 | add r1, r1, #1 | ||||
b .Lmemmove_bl4 | b .Lmemmove_bl4 | ||||
#ifndef _BCOPY | #ifndef _BCOPY | ||||
END(memmove) | END(memmove) | ||||
#else | #else | ||||
END(bcopy) | END(bcopy) | ||||
#endif | #endif | ||||
.section .note.GNU-stack,"",%progbits | .section .note.GNU-stack,"",%progbits |