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sys/dev/virtio/pci/virtio_pci_modern_var.h
- This file was added.
/* | |||||
* SPDX-License-Identifier: BSD-3-Clause | |||||
* | |||||
* Copyright IBM Corp. 2007 | |||||
* | |||||
* Authors: | |||||
* Anthony Liguori <aliguori@us.ibm.com> | |||||
* | |||||
* This header is BSD licensed so anyone can use the definitions to implement | |||||
* compatible drivers/servers. | |||||
* | |||||
* Redistribution and use in source and binary forms, with or without | |||||
* modification, are permitted provided that the following conditions | |||||
* are met: | |||||
* 1. Redistributions of source code must retain the above copyright | |||||
* notice, this list of conditions and the following disclaimer. | |||||
* 2. Redistributions in binary form must reproduce the above copyright | |||||
* notice, this list of conditions and the following disclaimer in the | |||||
* documentation and/or other materials provided with the distribution. | |||||
* 3. Neither the name of IBM nor the names of its contributors | |||||
* may be used to endorse or promote products derived from this software | |||||
* without specific prior written permission. | |||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | |||||
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED | |||||
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR | |||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL IBM OR CONTRIBUTORS BE LIABLE | |||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | |||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS | |||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | |||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | |||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | |||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | |||||
* SUCH DAMAGE. | |||||
* | |||||
* $FreeBSD$ | |||||
*/ | |||||
#ifndef _VIRTIO_PCI_MODERN_VAR_H | |||||
#define _VIRTIO_PCI_MODERN_VAR_H | |||||
#include <dev/virtio/pci/virtio_pci_var.h> | |||||
/* IDs for different capabilities. Must all exist. */ | |||||
/* Common configuration */ | |||||
#define VIRTIO_PCI_CAP_COMMON_CFG 1 | |||||
/* Notifications */ | |||||
#define VIRTIO_PCI_CAP_NOTIFY_CFG 2 | |||||
/* ISR access */ | |||||
#define VIRTIO_PCI_CAP_ISR_CFG 3 | |||||
/* Device specific configuration */ | |||||
#define VIRTIO_PCI_CAP_DEVICE_CFG 4 | |||||
/* PCI configuration access */ | |||||
#define VIRTIO_PCI_CAP_PCI_CFG 5 | |||||
/* This is the PCI capability header: */ | |||||
struct virtio_pci_cap { | |||||
uint8_t cap_vndr; /* Generic PCI field: PCI_CAP_ID_VNDR */ | |||||
uint8_t cap_next; /* Generic PCI field: next ptr. */ | |||||
uint8_t cap_len; /* Generic PCI field: capability length */ | |||||
uint8_t cfg_type; /* Identifies the structure. */ | |||||
uint8_t bar; /* Where to find it. */ | |||||
uint8_t padding[3]; /* Pad to full dword. */ | |||||
uint32_t offset; /* Offset within bar. */ | |||||
uint32_t length; /* Length of the structure, in bytes. */ | |||||
}; | |||||
struct virtio_pci_notify_cap { | |||||
struct virtio_pci_cap cap; | |||||
uint32_t notify_off_multiplier; /* Multiplier for queue_notify_off. */ | |||||
}; | |||||
/* Fields in VIRTIO_PCI_CAP_COMMON_CFG: */ | |||||
struct virtio_pci_common_cfg { | |||||
/* About the whole device. */ | |||||
uint32_t device_feature_select; /* read-write */ | |||||
uint32_t device_feature; /* read-only */ | |||||
uint32_t guest_feature_select; /* read-write */ | |||||
uint32_t guest_feature; /* read-write */ | |||||
uint16_t msix_config; /* read-write */ | |||||
uint16_t num_queues; /* read-only */ | |||||
uint8_t device_status; /* read-write */ | |||||
uint8_t config_generation; /* read-only */ | |||||
/* About a specific virtqueue. */ | |||||
uint16_t queue_select; /* read-write */ | |||||
uint16_t queue_size; /* read-write, power of 2. */ | |||||
uint16_t queue_msix_vector; /* read-write */ | |||||
uint16_t queue_enable; /* read-write */ | |||||
uint16_t queue_notify_off; /* read-only */ | |||||
uint32_t queue_desc_lo; /* read-write */ | |||||
uint32_t queue_desc_hi; /* read-write */ | |||||
uint32_t queue_avail_lo; /* read-write */ | |||||
uint32_t queue_avail_hi; /* read-write */ | |||||
uint32_t queue_used_lo; /* read-write */ | |||||
uint32_t queue_used_hi; /* read-write */ | |||||
}; | |||||
/* Fields in VIRTIO_PCI_CAP_PCI_CFG: */ | |||||
struct virtio_pci_cfg_cap { | |||||
struct virtio_pci_cap cap; | |||||
uint8_t pci_cfg_data[4]; /* Data for BAR access. */ | |||||
}; | |||||
/* Macro versions of offsets for the Old Timers! */ | |||||
#define VIRTIO_PCI_CAP_VNDR 0 | |||||
#define VIRTIO_PCI_CAP_NEXT 1 | |||||
#define VIRTIO_PCI_CAP_LEN 2 | |||||
#define VIRTIO_PCI_CAP_CFG_TYPE 3 | |||||
#define VIRTIO_PCI_CAP_BAR 4 | |||||
#define VIRTIO_PCI_CAP_OFFSET 8 | |||||
#define VIRTIO_PCI_CAP_LENGTH 12 | |||||
#define VIRTIO_PCI_NOTIFY_CAP_MULT 16 | |||||
#define VIRTIO_PCI_COMMON_DFSELECT 0 | |||||
#define VIRTIO_PCI_COMMON_DF 4 | |||||
#define VIRTIO_PCI_COMMON_GFSELECT 8 | |||||
#define VIRTIO_PCI_COMMON_GF 12 | |||||
#define VIRTIO_PCI_COMMON_MSIX 16 | |||||
#define VIRTIO_PCI_COMMON_NUMQ 18 | |||||
#define VIRTIO_PCI_COMMON_STATUS 20 | |||||
#define VIRTIO_PCI_COMMON_CFGGENERATION 21 | |||||
#define VIRTIO_PCI_COMMON_Q_SELECT 22 | |||||
#define VIRTIO_PCI_COMMON_Q_SIZE 24 | |||||
#define VIRTIO_PCI_COMMON_Q_MSIX 26 | |||||
#define VIRTIO_PCI_COMMON_Q_ENABLE 28 | |||||
#define VIRTIO_PCI_COMMON_Q_NOFF 30 | |||||
#define VIRTIO_PCI_COMMON_Q_DESCLO 32 | |||||
#define VIRTIO_PCI_COMMON_Q_DESCHI 36 | |||||
#define VIRTIO_PCI_COMMON_Q_AVAILLO 40 | |||||
#define VIRTIO_PCI_COMMON_Q_AVAILHI 44 | |||||
#define VIRTIO_PCI_COMMON_Q_USEDLO 48 | |||||
#define VIRTIO_PCI_COMMON_Q_USEDHI 52 | |||||
#endif /* _VIRTIO_PCI_MODERN_VAR_H */ |