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sys/dev/virtio/pci/virtio_pci_legacy_var.h
- This file was copied from sys/dev/virtio/pci/virtio_pci.h.
| Show All 29 Lines | |||||
| * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | ||||
| * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | ||||
| * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | ||||
| * SUCH DAMAGE. | * SUCH DAMAGE. | ||||
| * | * | ||||
| * $FreeBSD$ | * $FreeBSD$ | ||||
| */ | */ | ||||
| #ifndef _VIRTIO_PCI_H | #ifndef _VIRTIO_PCI_LEGACY_VAR_H | ||||
| #define _VIRTIO_PCI_H | #define _VIRTIO_PCI_LEGACY_VAR_H | ||||
| /* VirtIO PCI vendor/device ID. */ | #include <dev/virtio/pci/virtio_pci_var.h> | ||||
| #define VIRTIO_PCI_VENDORID 0x1AF4 | |||||
| #define VIRTIO_PCI_DEVICEID_MIN 0x1000 | |||||
| #define VIRTIO_PCI_DEVICEID_MAX 0x103F | |||||
| /* VirtIO ABI version, this must match exactly. */ | /* VirtIO ABI version, this must match exactly. */ | ||||
| #define VIRTIO_PCI_ABI_VERSION 0 | #define VIRTIO_PCI_ABI_VERSION 0 | ||||
| /* | /* | ||||
| * VirtIO Header, located in BAR 0. | * VirtIO Header, located in BAR 0. | ||||
| */ | */ | ||||
| #define VIRTIO_PCI_HOST_FEATURES 0 /* host's supported features (32bit, RO)*/ | #define VIRTIO_PCI_HOST_FEATURES 0 /* host's supported features (32bit, RO)*/ | ||||
| #define VIRTIO_PCI_GUEST_FEATURES 4 /* guest's supported features (32, RW) */ | #define VIRTIO_PCI_GUEST_FEATURES 4 /* guest's supported features (32, RW) */ | ||||
| #define VIRTIO_PCI_QUEUE_PFN 8 /* physical address of VQ (32, RW) */ | #define VIRTIO_PCI_QUEUE_PFN 8 /* physical address of VQ (32, RW) */ | ||||
| #define VIRTIO_PCI_QUEUE_NUM 12 /* number of ring entries (16, RO) */ | #define VIRTIO_PCI_QUEUE_NUM 12 /* number of ring entries (16, RO) */ | ||||
| #define VIRTIO_PCI_QUEUE_SEL 14 /* current VQ selection (16, RW) */ | #define VIRTIO_PCI_QUEUE_SEL 14 /* current VQ selection (16, RW) */ | ||||
| #define VIRTIO_PCI_QUEUE_NOTIFY 16 /* notify host regarding VQ (16, RW) */ | #define VIRTIO_PCI_QUEUE_NOTIFY 16 /* notify host regarding VQ (16, RW) */ | ||||
| #define VIRTIO_PCI_STATUS 18 /* device status register (8, RW) */ | #define VIRTIO_PCI_STATUS 18 /* device status register (8, RW) */ | ||||
| #define VIRTIO_PCI_ISR 19 /* interrupt status register, reading | #define VIRTIO_PCI_ISR 19 /* interrupt status register, reading | ||||
| * also clears the register (8, RO) */ | * also clears the register (8, RO) */ | ||||
| /* Only if MSIX is enabled: */ | /* Only if MSIX is enabled: */ | ||||
| #define VIRTIO_MSI_CONFIG_VECTOR 20 /* configuration change vector (16, RW) */ | #define VIRTIO_MSI_CONFIG_VECTOR 20 /* configuration change vector (16, RW) */ | ||||
| #define VIRTIO_MSI_QUEUE_VECTOR 22 /* vector for selected VQ notifications | #define VIRTIO_MSI_QUEUE_VECTOR 22 /* vector for selected VQ notifications | ||||
| (16, RW) */ | (16, RW) */ | ||||
| /* The bit of the ISR which indicates a device has an interrupt. */ | |||||
| #define VIRTIO_PCI_ISR_INTR 0x1 | |||||
| /* The bit of the ISR which indicates a device configuration change. */ | |||||
| #define VIRTIO_PCI_ISR_CONFIG 0x2 | |||||
| /* Vector value used to disable MSI for queue. */ | |||||
| #define VIRTIO_MSI_NO_VECTOR 0xFFFF | |||||
| /* | /* | ||||
| * The remaining space is defined by each driver as the per-driver | * The remaining space is defined by each driver as the per-driver | ||||
| * configuration space. | * configuration space. | ||||
| */ | */ | ||||
| #define VIRTIO_PCI_CONFIG_OFF(msix_enabled) ((msix_enabled) ? 24 : 20) | #define VIRTIO_PCI_CONFIG_OFF(msix_enabled) ((msix_enabled) ? 24 : 20) | ||||
| /* | /* | ||||
| * How many bits to shift physical queue address written to QUEUE_PFN. | * How many bits to shift physical queue address written to QUEUE_PFN. | ||||
| * 12 is historical, and due to x86 page size. | * 12 is historical, and due to x86 page size. | ||||
| */ | */ | ||||
| #define VIRTIO_PCI_QUEUE_ADDR_SHIFT 12 | #define VIRTIO_PCI_QUEUE_ADDR_SHIFT 12 | ||||
| /* The alignment to use between consumer and producer parts of vring. */ | /* The alignment to use between consumer and producer parts of vring. */ | ||||
| #define VIRTIO_PCI_VRING_ALIGN 4096 | #define VIRTIO_PCI_VRING_ALIGN 4096 | ||||
| #endif /* _VIRTIO_PCI_H */ | #endif /* _VIRTIO_PCI_LEGACY_VAR_H */ | ||||