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head/sys/sys/gpio.h
Show First 20 Lines • Show All 47 Lines • ▼ Show 20 Lines | |||||
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | ||||
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | ||||
*/ | */ | ||||
#ifndef __GPIO_H__ | #ifndef __GPIO_H__ | ||||
#define __GPIO_H__ | #define __GPIO_H__ | ||||
#include <sys/ioccom.h> | #include <sys/ioccom.h> | ||||
#ifndef _KERNEL | |||||
#include <stdbool.h> | |||||
#endif | |||||
/* GPIO pin states */ | /* GPIO pin states */ | ||||
#define GPIO_PIN_LOW 0x00 /* low level (logical 0) */ | #define GPIO_PIN_LOW 0x00 /* low level (logical 0) */ | ||||
#define GPIO_PIN_HIGH 0x01 /* high level (logical 1) */ | #define GPIO_PIN_HIGH 0x01 /* high level (logical 1) */ | ||||
/* Max name length of a pin */ | /* Max name length of a pin */ | ||||
#define GPIOMAXNAME 64 | #define GPIOMAXNAME 64 | ||||
Show All 12 Lines | |||||
#define GPIO_PIN_PRESET_HIGH 0x00000800 /* low before enabling output */ | #define GPIO_PIN_PRESET_HIGH 0x00000800 /* low before enabling output */ | ||||
/* GPIO interrupt capabilities */ | /* GPIO interrupt capabilities */ | ||||
#define GPIO_INTR_NONE 0x00000000 /* no interrupt support */ | #define GPIO_INTR_NONE 0x00000000 /* no interrupt support */ | ||||
#define GPIO_INTR_LEVEL_LOW 0x00010000 /* level trigger, low */ | #define GPIO_INTR_LEVEL_LOW 0x00010000 /* level trigger, low */ | ||||
#define GPIO_INTR_LEVEL_HIGH 0x00020000 /* level trigger, high */ | #define GPIO_INTR_LEVEL_HIGH 0x00020000 /* level trigger, high */ | ||||
#define GPIO_INTR_EDGE_RISING 0x00040000 /* edge trigger, rising */ | #define GPIO_INTR_EDGE_RISING 0x00040000 /* edge trigger, rising */ | ||||
#define GPIO_INTR_EDGE_FALLING 0x00080000 /* edge trigger, falling */ | #define GPIO_INTR_EDGE_FALLING 0x00080000 /* edge trigger, falling */ | ||||
#define GPIO_INTR_EDGE_BOTH 0x00100000 /* edge trigger, both */ | #define GPIO_INTR_EDGE_BOTH 0x00100000 /* edge trigger, both */ | ||||
#define GPIO_INTR_ATTACHED 0x00200000 /* interrupt attached to file */ | |||||
#define GPIO_INTR_MASK (GPIO_INTR_LEVEL_LOW | GPIO_INTR_LEVEL_HIGH | \ | #define GPIO_INTR_MASK (GPIO_INTR_LEVEL_LOW | GPIO_INTR_LEVEL_HIGH | \ | ||||
GPIO_INTR_EDGE_RISING | \ | GPIO_INTR_EDGE_RISING | \ | ||||
GPIO_INTR_EDGE_FALLING | GPIO_INTR_EDGE_BOTH) | GPIO_INTR_EDGE_FALLING | GPIO_INTR_EDGE_BOTH | \ | ||||
GPIO_INTR_ATTACHED) | |||||
struct gpio_pin { | struct gpio_pin { | ||||
uint32_t gp_pin; /* pin number */ | uint32_t gp_pin; /* pin number */ | ||||
char gp_name[GPIOMAXNAME]; /* human-readable name */ | char gp_name[GPIOMAXNAME]; /* human-readable name */ | ||||
uint32_t gp_caps; /* capabilities */ | uint32_t gp_caps; /* capabilities */ | ||||
uint32_t gp_flags; /* current flags */ | uint32_t gp_flags; /* current flags */ | ||||
}; | }; | ||||
/* GPIO pin request (read/write/toggle) */ | /* GPIO pin request (read/write/toggle) */ | ||||
struct gpio_req { | struct gpio_req { | ||||
uint32_t gp_pin; /* pin number */ | uint32_t gp_pin; /* pin number */ | ||||
uint32_t gp_value; /* value */ | uint32_t gp_value; /* value */ | ||||
}; | }; | ||||
/* | /* | ||||
* Reporting gpio pin-change per-event details to userland. | |||||
* | |||||
* When configured for detail reporting, each call to read(2) will return one or | |||||
* more of these structures (or will return EWOULDBLOCK in non-blocking IO mode | |||||
* when there are no new events to report). | |||||
*/ | |||||
struct gpio_event_detail { | |||||
sbintime_t gp_time; /* Time of event */ | |||||
uint16_t gp_pin; /* Pin number */ | |||||
bool gp_pinstate; /* Pin state at time of event */ | |||||
}; | |||||
/* | |||||
* Reporting gpio pin-change summary data to userland. | |||||
* | |||||
* When configured for summary reporting, each call to read(2) will return one | |||||
* or more of these structures (or will return EWOULDBLOCK in non-blocking IO | |||||
* mode when there are no new events to report). | |||||
*/ | |||||
struct gpio_event_summary { | |||||
sbintime_t gp_first_time; /* Time of first event */ | |||||
sbintime_t gp_last_time; /* Time of last event */ | |||||
uint16_t gp_pin; /* Pin number */ | |||||
uint16_t gp_count; /* Event count */ | |||||
bool gp_first_state; /* Pin state at first event */ | |||||
bool gp_last_state; /* Pin state at last event */ | |||||
}; | |||||
/* | |||||
* Configuring event reporting to userland. | |||||
* | |||||
* The default is to deliver gpio_event_detail reporting, with a default fifo | |||||
* size of 2 * number of pins belonging to the gpioc device instance. To change | |||||
* it, you must use the GPIOCONFIGEVENTS ioctl before using GPIOSETCONFIG to | |||||
* configure reporting interrupt events on any pins. This config is tracked on | |||||
* a per-open-descriptor basis. | |||||
*/ | |||||
enum { | |||||
GPIO_EVENT_REPORT_DETAIL, /* Report detail on each event */ | |||||
GPIO_EVENT_REPORT_SUMMARY, /* Report summary of events */ | |||||
}; | |||||
struct gpio_event_config { | |||||
uint32_t gp_report_type; /* Detail or summary reporting */ | |||||
uint32_t gp_fifo_size; /* FIFO size (used for detail only) */ | |||||
}; | |||||
/* | |||||
* gpio_access_32 / GPIOACCESS32 | * gpio_access_32 / GPIOACCESS32 | ||||
* | * | ||||
* Simultaneously read and/or change up to 32 adjacent pins. | * Simultaneously read and/or change up to 32 adjacent pins. | ||||
* If the device cannot change the pins simultaneously, returns EOPNOTSUPP. | * If the device cannot change the pins simultaneously, returns EOPNOTSUPP. | ||||
* | * | ||||
* This accesses an adjacent set of up to 32 pins starting at first_pin within | * This accesses an adjacent set of up to 32 pins starting at first_pin within | ||||
* the device's collection of pins. How the hardware pins are mapped to the 32 | * the device's collection of pins. How the hardware pins are mapped to the 32 | ||||
* bits in the arguments is device-specific. It is expected that lower-numbered | * bits in the arguments is device-specific. It is expected that lower-numbered | ||||
Show All 32 Lines | |||||
* regard. Notably unlike pin_access_32(), this does NOT fail if the pins | * regard. Notably unlike pin_access_32(), this does NOT fail if the pins | ||||
* cannot be atomically configured; it is expected that callers understand the | * cannot be atomically configured; it is expected that callers understand the | ||||
* hardware and have decided to live with any such limitations it may have. | * hardware and have decided to live with any such limitations it may have. | ||||
* | * | ||||
* The pin_flags argument is an array of GPIO_PIN_xxxx flags. If the array | * The pin_flags argument is an array of GPIO_PIN_xxxx flags. If the array | ||||
* contains any GPIO_PIN_OUTPUT flags, the driver will manipulate the hardware | * contains any GPIO_PIN_OUTPUT flags, the driver will manipulate the hardware | ||||
* such that all output pins become driven with the proper initial values | * such that all output pins become driven with the proper initial values | ||||
* simultaneously if it can. The elements in the array map to pins in the same | * simultaneously if it can. The elements in the array map to pins in the same | ||||
* way that bits are mapped by pin_acces_32(), and the same restrictions may | * way that bits are mapped by pin_access_32(), and the same restrictions may | ||||
* apply. For example, to configure pins 2 and 3 it may be necessary to set | * apply. For example, to configure pins 2 and 3 it may be necessary to set | ||||
* first_pin to zero and only populate pin_flags[2] and pin_flags[3]. If a | * first_pin to zero and only populate pin_flags[2] and pin_flags[3]. If a | ||||
* given array entry doesn't contain GPIO_PIN_INPUT or GPIO_PIN_OUTPUT then no | * given array entry doesn't contain GPIO_PIN_INPUT or GPIO_PIN_OUTPUT then no | ||||
* configuration is done for that pin. | * configuration is done for that pin. | ||||
* | * | ||||
* Some devices may limit the value of first_pin to 0, or to multiples of 16 or | * Some devices may limit the value of first_pin to 0, or to multiples of 16 or | ||||
* 32 or some other hardware-specific number. Invalid values in first_pin or | * 32 or some other hardware-specific number. Invalid values in first_pin or | ||||
* num_pins result in an error return with errno set to EINVAL. | * num_pins result in an error return with errno set to EINVAL. | ||||
* | |||||
* You cannot configure interrupts (userland pin-change notifications) with | |||||
* this function; each interrupt pin must be individually configured. | |||||
*/ | */ | ||||
struct gpio_config_32 { | struct gpio_config_32 { | ||||
uint32_t first_pin; | uint32_t first_pin; | ||||
uint32_t num_pins; | uint32_t num_pins; | ||||
uint32_t pin_flags[32]; | uint32_t pin_flags[32]; | ||||
}; | }; | ||||
/* | /* | ||||
* ioctls | * ioctls | ||||
*/ | */ | ||||
#define GPIOMAXPIN _IOR('G', 0, int) | #define GPIOMAXPIN _IOR('G', 0, int) | ||||
#define GPIOGETCONFIG _IOWR('G', 1, struct gpio_pin) | #define GPIOGETCONFIG _IOWR('G', 1, struct gpio_pin) | ||||
#define GPIOSETCONFIG _IOW('G', 2, struct gpio_pin) | #define GPIOSETCONFIG _IOW('G', 2, struct gpio_pin) | ||||
#define GPIOGET _IOWR('G', 3, struct gpio_req) | #define GPIOGET _IOWR('G', 3, struct gpio_req) | ||||
#define GPIOSET _IOW('G', 4, struct gpio_req) | #define GPIOSET _IOW('G', 4, struct gpio_req) | ||||
#define GPIOTOGGLE _IOWR('G', 5, struct gpio_req) | #define GPIOTOGGLE _IOWR('G', 5, struct gpio_req) | ||||
#define GPIOSETNAME _IOW('G', 6, struct gpio_pin) | #define GPIOSETNAME _IOW('G', 6, struct gpio_pin) | ||||
#define GPIOACCESS32 _IOWR('G', 7, struct gpio_access_32) | #define GPIOACCESS32 _IOWR('G', 7, struct gpio_access_32) | ||||
#define GPIOCONFIG32 _IOW('G', 8, struct gpio_config_32) | #define GPIOCONFIG32 _IOW('G', 8, struct gpio_config_32) | ||||
#define GPIOCONFIGEVENTS _IOW('G', 9, struct gpio_event_config) | |||||
#endif /* __GPIO_H__ */ | #endif /* __GPIO_H__ */ |