Changeset View
Changeset View
Standalone View
Standalone View
sys/arm64/include/hypervisor.h
Show First 20 Lines • Show All 176 Lines • ▼ Show 20 Lines | |||||
#define VTCR_EL2_PS_44BIT (0x4 << VTCR_EL2_PS_SHIFT) | #define VTCR_EL2_PS_44BIT (0x4 << VTCR_EL2_PS_SHIFT) | ||||
#define VTCR_EL2_PS_48BIT (0x5 << VTCR_EL2_PS_SHIFT) | #define VTCR_EL2_PS_48BIT (0x5 << VTCR_EL2_PS_SHIFT) | ||||
/* VTTBR_EL2 - Virtualization Translation Table Base Register */ | /* VTTBR_EL2 - Virtualization Translation Table Base Register */ | ||||
#define VTTBR_VMID_MASK 0xffff000000000000 | #define VTTBR_VMID_MASK 0xffff000000000000 | ||||
#define VTTBR_VMID_SHIFT 48 | #define VTTBR_VMID_SHIFT 48 | ||||
#define VTTBR_HOST 0x0000000000000000 | #define VTTBR_HOST 0x0000000000000000 | ||||
/* VTCR_EL2 - Virtualization Translation Control Register */ | |||||
#define VTCR_EL2_RES1 (0x1 << 31) | |||||
#define VTCR_EL2_T0SZ_MASK 0x3f | |||||
#define VTCR_EL2_SL0_SHIFT 6 | |||||
#define VTCR_EL2_SL0_4K_LVL2 (0x0 << VTCR_EL2_SL0_SHIFT) | |||||
#define VTCR_EL2_SL0_4K_LVL1 (0x1 << VTCR_EL2_SL0_SHIFT) | |||||
#define VTCR_EL2_SL0_4K_LVL0 (0x2 << VTCR_EL2_SL0_SHIFT) | |||||
#define VTCR_EL2_IRGN0_SHIFT 8 | |||||
#define VTCR_EL2_IRGN0_WBWA (0x1 << VTCR_EL2_IRGN0_SHIFT) | |||||
#define VTCR_EL2_ORGN0_SHIFT 10 | |||||
#define VTCR_EL2_ORGN0_WBWA (0x1 << VTCR_EL2_ORGN0_SHIFT) | |||||
#define VTCR_EL2_SH0_SHIFT 12 | |||||
#define VTCR_EL2_SH0_NS (0x0 << VTCR_EL2_SH0_SHIFT) | |||||
#define VTCR_EL2_SH0_OS (0x2 << VTCR_EL2_SH0_SHIFT) | |||||
#define VTCR_EL2_SH0_IS (0x3 << VTCR_EL2_SH0_SHIFT) | |||||
#define VTCR_EL2_TG0_SHIFT 14 | |||||
#define VTCR_EL2_TG0_4K (0x0 << VTCR_EL2_TG0_SHIFT) | |||||
#define VTCR_EL2_TG0_64K (0x1 << VTCR_EL2_TG0_SHIFT) | |||||
#define VTCR_EL2_TG0_16K (0x2 << VTCR_EL2_TG0_SHIFT) | |||||
#define VTCR_EL2_PS_SHIFT 16 | |||||
#define VTCR_EL2_PS_32BIT (0x0 << VTCR_EL2_PS_SHIFT) | |||||
#define VTCR_EL2_PS_36BIT (0x1 << VTCR_EL2_PS_SHIFT) | |||||
#define VTCR_EL2_PS_40BIT (0x2 << VTCR_EL2_PS_SHIFT) | |||||
#define VTCR_EL2_PS_42BIT (0x3 << VTCR_EL2_PS_SHIFT) | |||||
#define VTCR_EL2_PS_44BIT (0x4 << VTCR_EL2_PS_SHIFT) | |||||
#define VTCR_EL2_PS_48BIT (0x5 << VTCR_EL2_PS_SHIFT) | |||||
/* HPFAR_EL2 - Hypervisor IPA Fault Address Register */ | |||||
#define HPFAR_EL2_FIPA_SHIFT 4 | |||||
#define HPFAR_EL2_FIPA_MASK 0xfffffffff0 | |||||
#endif /* !_MACHINE_HYPERVISOR_H_ */ | #endif /* !_MACHINE_HYPERVISOR_H_ */ |