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Differential D26209 Diff 79590 usr.sbin/bhyve/pci_emul.h

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usr.sbin/bhyve/pci_emul.h

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#include <sys/queue.h> #include <sys/queue.h>
#include <sys/kernel.h> #include <sys/kernel.h>
#include <sys/_pthreadtypes.h> #include <sys/_pthreadtypes.h>
#include <dev/pci/pcireg.h> #include <dev/pci/pcireg.h>
#include <assert.h> #include <assert.h>
#include <string.h>
#define PCI_BARMAX PCIR_MAX_BAR_0 /* BAR registers in a Type 0 header */ #define PCI_BARMAX PCIR_MAX_BAR_0 /* BAR registers in a Type 0 header */
struct vmctx; struct vmctx;
struct pci_devinst; struct pci_devinst;
struct memory_region; struct memory_region;
struct vm_snapshot_meta; struct vm_snapshot_meta;
struct pci_devemu { struct pci_devemu {
char *pe_emu; /* Name of device emulation */ char *pe_emu; /* Name of device emulation */
/* instance creation */ /* instance creation */
int (*pe_init)(struct vmctx *, struct pci_devinst *, int (*pe_init)(struct vmctx *, struct pci_devinst *,
char *opts); char *opts);
int (*pe_quirks_init)(struct vmctx *ctx, struct pci_devinst *pi,
char *opts);
void (*pe_quirks_deinit)(struct vmctx *ctx, struct pci_devinst *pi);
/* ACPI DSDT enumeration */ /* ACPI DSDT enumeration */
void (*pe_write_dsdt)(struct pci_devinst *); void (*pe_write_dsdt)(struct pci_devinst *);
/* config space read/write callbacks */ /* config space read/write callbacks */
int (*pe_cfgwrite)(struct vmctx *ctx, int vcpu, int (*pe_cfgwrite)(struct vmctx *ctx, int vcpu,
struct pci_devinst *pi, int offset, struct pci_devinst *pi, int offset,
int bytes, uint32_t val); int bytes, uint32_t val);
Show All 26 Linesenum pcibar_type {
PCIBAR_MEM64, PCIBAR_MEM64,
PCIBAR_MEMHI64 PCIBAR_MEMHI64
}; };
struct pcibar { struct pcibar {
enum pcibar_type type; /* io or memory */ enum pcibar_type type; /* io or memory */
uint64_t size; uint64_t size;
uint64_t addr; uint64_t addr;
uint8_t lobits;
}; };
#define PI_NAMESZ 40 #define PI_NAMESZ 40
struct msix_table_entry { struct msix_table_entry {
uint64_t addr; uint64_t addr;
uint32_t msg_data; uint32_t msg_data;
uint32_t vector_control; uint32_t vector_control;
▲ Show 20 Lines • Show All 115 Lines • ▼ Show 20 Linestypedef void (*pci_lintr_cb)(int b, int s, int pin, int pirq_pin,
int ioapic_irq, void *arg); int ioapic_irq, void *arg);
int init_pci(struct vmctx *ctx); int init_pci(struct vmctx *ctx);
void pci_callback(void); void pci_callback(void);
int pci_emul_alloc_bar(struct pci_devinst *pdi, int idx, int pci_emul_alloc_bar(struct pci_devinst *pdi, int idx,
enum pcibar_type type, uint64_t size); enum pcibar_type type, uint64_t size);
int pci_emul_alloc_pbar(struct pci_devinst *pdi, int idx, int pci_emul_alloc_pbar(struct pci_devinst *pdi, int idx,
uint64_t hostbase, enum pcibar_type type, uint64_t size); uint64_t hostbase, enum pcibar_type type, uint64_t size);
uint64_t pci_emul_alloc_mmio(enum pcibar_type type, uint64_t size, uint64_t mask);
int passthru_modify_bar_registration(struct pci_devinst *pi, int idx, int registration);
int pci_emul_add_msicap(struct pci_devinst *pi, int msgnum); int pci_emul_add_msicap(struct pci_devinst *pi, int msgnum);
int pci_emul_add_pciecap(struct pci_devinst *pi, int pcie_device_type); int pci_emul_add_pciecap(struct pci_devinst *pi, int pcie_device_type);
void pci_emul_capwrite(struct pci_devinst *pi, int offset, int bytes, void pci_emul_capwrite(struct pci_devinst *pi, int offset, int bytes,
uint32_t val, uint8_t capoff, int capid); uint32_t val, uint8_t capoff, int capid);
void pci_emul_cmd_changed(struct pci_devinst *pi, uint16_t old); void pci_emul_cmd_changed(struct pci_devinst *pi, uint16_t old);
void pci_generate_msi(struct pci_devinst *pi, int msgnum); void pci_generate_msi(struct pci_devinst *pi, int msgnum);
void pci_generate_msix(struct pci_devinst *pi, int msgnum); void pci_generate_msix(struct pci_devinst *pi, int msgnum);
void pci_lintr_assert(struct pci_devinst *pi); void pci_lintr_assert(struct pci_devinst *pi);
▲ Show 20 Lines • Show All 57 Lines • ▼ Show 20 Linespci_get_cfgdata16(struct pci_devinst *pi, int offset)
return (*(uint16_t *)(pi->pi_cfgdata + offset)); return (*(uint16_t *)(pi->pi_cfgdata + offset));
} }
static __inline uint32_t static __inline uint32_t
pci_get_cfgdata32(struct pci_devinst *pi, int offset) pci_get_cfgdata32(struct pci_devinst *pi, int offset)
{ {
assert(offset <= (PCI_REGMAX - 3) && (offset & 3) == 0); assert(offset <= (PCI_REGMAX - 3) && (offset & 3) == 0);
return (*(uint32_t *)(pi->pi_cfgdata + offset)); return (*(uint32_t *)(pi->pi_cfgdata + offset));
}
static __inline int
is_gvt_d(struct pci_devinst *pi)
corvinkAuthorUnsubmitted
Done
Inline Actions

Changing this function would enable GPU-Passthrough of dedicated graphics to a Windows VM:

static __inline int
is_passthru(struct pci_devinst *pi)
{
    return ((strcmp(pi->pi_d->pe_emu, "passthru") == 0) ||
            (strcmp(pi->pi_d->pe_emu, "gvt-d") == 0));
}
corvink: Changing this function would enable GPU-Passthrough of dedicated graphics to a Windows VM: ```…
{
return (strcmp(pi->pi_d->pe_emu, "gvt-d") == 0);
} }
#endif /* _PCI_EMUL_H_ */ #endif /* _PCI_EMUL_H_ */