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	/*			/*
	* Floating-point exception modes:			* Floating-point exception modes:
	*/			*/
	#define PSL_FE_DIS 0 /* none */			#define PSL_FE_DIS 0 /* none */
	#define PSL_FE_NONREC PSL_FE1 /* imprecise non-recoverable */			#define PSL_FE_NONREC PSL_FE1 /* imprecise non-recoverable */
	#define PSL_FE_REC PSL_FE0 /* imprecise recoverable */			#define PSL_FE_REC PSL_FE0 /* imprecise recoverable */
	#define PSL_FE_PREC (PSL_FE0 \| PSL_FE1) /* precise */			#define PSL_FE_PREC (PSL_FE0 \| PSL_FE1) /* precise */
	#define PSL_FE_DFLT PSL_FE_DIS /* default == none */			#define PSL_FE_DFLT PSL_FE_PREC /* default == precise */

	#ifndef LOCORE			#ifndef LOCORE
	extern register_t psl_kernset; /* Default MSR values for kernel */			extern register_t psl_kernset; /* Default MSR values for kernel */
	extern register_t psl_userset; /* Default MSR values for userland */			extern register_t psl_userset; /* Default MSR values for userland */
	#ifdef __powerpc64__			#ifdef __powerpc64__
	extern register_t psl_userset32; /* Default user MSR values for 32-bit */			extern register_t psl_userset32; /* Default user MSR values for 32-bit */
	#endif			#endif
	extern register_t psl_userstatic; /* Bits of SRR1 userland may not set */			extern register_t psl_userstatic; /* Bits of SRR1 userland may not set */
	#endif			#endif

	#endif /* _MACHINE_PSL_H_ */			#endif /* _MACHINE_PSL_H_ */