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Differential D26532 Diff 79213 head/sys/powerpc/powerpc/cpu.c

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head/sys/powerpc/powerpc/cpu.c

Show First 20 Lines • Show All 371 Lines • ▼ Show 20 Lines switch (vers) {
case MPC7455: case MPC7455:
case MPC7457: case MPC7457:
case MPC750: case MPC750:
case IBM750FX: case IBM750FX:
case MPC7400: case MPC7400:
case MPC7410: case MPC7410:
case MPC7447A: case MPC7447A:
case MPC7448: case MPC7448:
mtspr(SPR_MMCR0, SPR_MMCR0_FC); mtspr(SPR_MMCR0_74XX, SPR_MMCR0_FC);
mtspr(SPR_PMC1, 0); mtspr(SPR_PMC1_74XX, 0);
mtspr(SPR_MMCR0, SPR_MMCR0_PMC1SEL(PMCN_CYCLES)); mtspr(SPR_MMCR0_74XX,
SPR_MMCR0_74XX_PMC1SEL(PMCN_CYCLES));
DELAY(1000); DELAY(1000);
*cps = (mfspr(SPR_PMC1) * 1000) + 4999; *cps = (mfspr(SPR_PMC1_74XX) * 1000) + 4999;
mtspr(SPR_MMCR0, SPR_MMCR0_FC); mtspr(SPR_MMCR0_74XX, SPR_MMCR0_FC);
mtmsr(msr); mtmsr(msr);
return (0); return (0);
case IBM970: case IBM970:
case IBM970FX: case IBM970FX:
case IBM970MP: case IBM970MP:
isync(); isync();
mtspr(SPR_970MMCR0, SPR_MMCR0_FC); mtspr(SPR_MMCR0, SPR_MMCR0_FC);
isync(); isync();
mtspr(SPR_970MMCR1, 0); mtspr(SPR_MMCR1, 0);
mtspr(SPR_970MMCRA, 0); mtspr(SPR_MMCRA, 0);
mtspr(SPR_970PMC1, 0); mtspr(SPR_PMC1, 0);
mtspr(SPR_970MMCR0, mtspr(SPR_MMCR0, SPR_MMCR0_PMC1SEL(PMC970N_CYCLES));
SPR_970MMCR0_PMC1SEL(PMC970N_CYCLES));
isync(); isync();
DELAY(1000); DELAY(1000);
powerpc_sync(); powerpc_sync();
mtspr(SPR_970MMCR0, SPR_MMCR0_FC); mtspr(SPR_MMCR0, SPR_MMCR0_FC);
*cps = (mfspr(SPR_970PMC1) * 1000) + 4999; *cps = (mfspr(SPR_PMC1) * 1000) + 4999;
mtmsr(msr); mtmsr(msr);
return (0); return (0);
default: default:
root = OF_peer(0); root = OF_peer(0);
if (root == 0) if (root == 0)
return (ENXIO); return (ENXIO);
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