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head/share/man/man4/ntb_hw_intel.4
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.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | .\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | ||||
.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | .\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | ||||
.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | .\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | ||||
.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | ||||
.\" SUCH DAMAGE. | .\" SUCH DAMAGE. | ||||
.\" | .\" | ||||
.\" $FreeBSD$ | .\" $FreeBSD$ | ||||
.\" | .\" | ||||
.Dd August 30, 2017 | .Dd October 11, 2020 | ||||
.Dt NTB_HW_INTEL 4 | .Dt NTB_HW_INTEL 4 | ||||
.Os | .Os | ||||
.Sh NAME | .Sh NAME | ||||
.Nm ntb_hw_intel | .Nm ntb_hw_intel | ||||
.Nd Intel(R) Non-Transparent Bridge driver | .Nd Intel(R) Non-Transparent Bridge driver | ||||
.Sh SYNOPSIS | .Sh SYNOPSIS | ||||
To compile this driver into your kernel, | To compile this driver into your kernel, | ||||
place the following lines in your kernel configuration file: | place the following lines in your kernel configuration file: | ||||
.Bd -ragged -offset indent | .Bd -ragged -offset indent | ||||
.Cd "device ntb" | .Cd "device ntb" | ||||
.Cd "device ntb_hw_intel" | .Cd "device ntb_hw_intel" | ||||
.Ed | .Ed | ||||
.Pp | .Pp | ||||
Or, to load the driver as a module at boot, place the following line in | Or, to load the driver as a module at boot, place the following line in | ||||
.Xr loader.conf 5 : | .Xr loader.conf 5 : | ||||
.Bd -literal -offset indent | .Bd -literal -offset indent | ||||
ntb_hw_intel_load="YES" | ntb_hw_intel_load="YES" | ||||
.Ed | .Ed | ||||
.Sh DESCRIPTION | .Sh DESCRIPTION | ||||
The | The | ||||
.Nm ntb_hw_intel | .Nm ntb_hw_intel | ||||
driver provides support for the Non-Transparent Bridge (NTB) hardware in | driver provides support for the Non-Transparent Bridge (NTB) hardware in | ||||
Intel Xeon E3/E5 and S1200 processor families, which allow one of their PCIe | Intel Xeon E3/E5 and S1200 processor families, which allow one of their PCIe | ||||
ports to be switched from transparent to non-transparent bridge mode. | ports to be switched from transparent to non-transparent bridge mode. | ||||
In this mode bridge looks not as a PCI bridge, but as PCI endpoint device. | In this mode the bridge looks not like a PCI bridge, but like a PCI endpoint | ||||
device. | |||||
The driver hides hardware details, exposing memory windows, scratchpads | The driver hides hardware details, exposing memory windows, scratchpads | ||||
and doorbells of the other side via hardware independent KPI to | and doorbells of the other side via a hardware independent KPI to the | ||||
.Xr ntb 4 | .Xr ntb 4 | ||||
subsystem. | subsystem. | ||||
.Pp | .Pp | ||||
The hardware provides 2 or 3 memory windows to the other system's memory, | The hardware provides 2 or 3 memory windows to the other system's memory, | ||||
16 scratchpad registers and 14 or 34 doorbells to interrupt the other system. | 16 scratchpad registers and 14, 31 or 34 doorbells to interrupt the other | ||||
On Xeon processors one of memory windows is typically consumed by the driver | system, depending on the platform. | ||||
itself to workaround multiple hardware erratas. | On Xeon processors one of the memory windows is typically consumed by the driver | ||||
itself to work around multiple hardware errata. | |||||
.Sh CONFIGURATION | .Sh CONFIGURATION | ||||
The NTB configuration should be set by BIOS. | The NTB configuration should be set by BIOS. | ||||
It includes enabling NTB, choosing between NTB-to-NTB (back-to-back) or | It includes enabling NTB, choosing between NTB-to-NTB (back-to-back) or | ||||
NTB-to-Root Port mode, | NTB-to-Root Port mode, | ||||
enabling split BAR mode (one of two 64-bit BARs can be split into two 32-bit | enabling split BAR mode (one of two 64-bit BARs can be split into two 32-bit | ||||
ones) and configuring BAR sizes in bits (from 12 to 29/39) for both NTB sides. | ones) and configuring BAR sizes in bits (from 12 to 29/39) for both NTB sides. | ||||
.Pp | .Pp | ||||
The recommended configuration is NTB-to-NTB mode, split bar is enabled and | The recommended configuration is NTB-to-NTB mode, split bar enabled and | ||||
all BAR sizes are set to 20 (1 MiB). | all BAR sizes set to 20 (1 MiB). | ||||
This needs to be done on both systems. | This needs to be done on both systems. | ||||
Note, on Xeon SkyLake and newer platforms, split bar mode is not available. | |||||
.Sh SEE ALSO | .Sh SEE ALSO | ||||
.Xr if_ntb 4 , | .Xr if_ntb 4 , | ||||
.Xr ntb_transport 4 , | .Xr ntb_transport 4 , | ||||
.Xr ntb 4 , | .Xr ntb 4 , | ||||
.Sh AUTHORS | .Sh AUTHORS | ||||
.An -nosplit | .An -nosplit | ||||
The | The | ||||
.Nm | .Nm | ||||
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