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sys/dev/ice/ice_type.h
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#define ICE_MAX_TRAFFIC_CLASS 8 | #define ICE_MAX_TRAFFIC_CLASS 8 | ||||
#ifndef MIN_T | #ifndef MIN_T | ||||
#define MIN_T(_t, _a, _b) min((_t)(_a), (_t)(_b)) | #define MIN_T(_t, _a, _b) min((_t)(_a), (_t)(_b)) | ||||
#endif | #endif | ||||
#define IS_ASCII(_ch) ((_ch) < 0x80) | #define IS_ASCII(_ch) ((_ch) < 0x80) | ||||
#define STRUCT_HACK_VAR_LEN | |||||
/** | |||||
* ice_struct_size - size of struct with C99 flexible array member | |||||
* @ptr: pointer to structure | |||||
* @field: flexible array member (last member of the structure) | |||||
* @num: number of elements of that flexible array member | |||||
*/ | |||||
#define ice_struct_size(ptr, field, num) \ | #define ice_struct_size(ptr, field, num) \ | ||||
(sizeof(*(ptr)) + sizeof(*(ptr)->field) * (num)) | (sizeof(*(ptr)) + sizeof(*(ptr)->field) * (num)) | ||||
#include "ice_status.h" | #include "ice_status.h" | ||||
#include "ice_hw_autogen.h" | #include "ice_hw_autogen.h" | ||||
#include "ice_devids.h" | #include "ice_devids.h" | ||||
#include "ice_osdep.h" | #include "ice_osdep.h" | ||||
#include "ice_bitops.h" /* Must come before ice_controlq.h */ | #include "ice_bitops.h" /* Must come before ice_controlq.h */ | ||||
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/* Media Types */ | /* Media Types */ | ||||
enum ice_media_type { | enum ice_media_type { | ||||
ICE_MEDIA_UNKNOWN = 0, | ICE_MEDIA_UNKNOWN = 0, | ||||
ICE_MEDIA_FIBER, | ICE_MEDIA_FIBER, | ||||
ICE_MEDIA_BASET, | ICE_MEDIA_BASET, | ||||
ICE_MEDIA_BACKPLANE, | ICE_MEDIA_BACKPLANE, | ||||
ICE_MEDIA_DA, | ICE_MEDIA_DA, | ||||
ICE_MEDIA_AUI, | |||||
}; | }; | ||||
/* Software VSI types. */ | /* Software VSI types. */ | ||||
enum ice_vsi_type { | enum ice_vsi_type { | ||||
ICE_VSI_PF = 0, | ICE_VSI_PF = 0, | ||||
ICE_VSI_VF = 1, | ICE_VSI_VF = 1, | ||||
ICE_VSI_LB = 6, | ICE_VSI_LB = 6, | ||||
}; | }; | ||||
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/* NVM Information */ | /* NVM Information */ | ||||
struct ice_nvm_info { | struct ice_nvm_info { | ||||
struct ice_orom_info orom; /* Option ROM version info */ | struct ice_orom_info orom; /* Option ROM version info */ | ||||
u32 eetrack; /* NVM data version */ | u32 eetrack; /* NVM data version */ | ||||
u16 sr_words; /* Shadow RAM size in words */ | u16 sr_words; /* Shadow RAM size in words */ | ||||
u32 flash_size; /* Size of available flash in bytes */ | u32 flash_size; /* Size of available flash in bytes */ | ||||
u8 major_ver; /* major version of dev starter */ | u8 major_ver; /* major version of dev starter */ | ||||
u8 minor_ver; /* minor version of dev starter */ | u8 minor_ver; /* minor version of dev starter */ | ||||
u8 blank_nvm_mode; /* is NVM empty (no FW present)*/ | u8 blank_nvm_mode; /* is NVM empty (no FW present) */ | ||||
}; | }; | ||||
struct ice_link_default_override_tlv { | struct ice_link_default_override_tlv { | ||||
u8 options; | u8 options; | ||||
#define ICE_LINK_OVERRIDE_OPT_M 0x3F | #define ICE_LINK_OVERRIDE_OPT_M 0x3F | ||||
#define ICE_LINK_OVERRIDE_STRICT_MODE BIT(0) | #define ICE_LINK_OVERRIDE_STRICT_MODE BIT(0) | ||||
#define ICE_LINK_OVERRIDE_EPCT_DIS BIT(1) | #define ICE_LINK_OVERRIDE_EPCT_DIS BIT(1) | ||||
#define ICE_LINK_OVERRIDE_PORT_DIS BIT(2) | #define ICE_LINK_OVERRIDE_PORT_DIS BIT(2) | ||||
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#define ICE_SCHED_MIN_BW 500 /* in Kbps */ | #define ICE_SCHED_MIN_BW 500 /* in Kbps */ | ||||
#define ICE_SCHED_MAX_BW 100000000 /* in Kbps */ | #define ICE_SCHED_MAX_BW 100000000 /* in Kbps */ | ||||
#define ICE_SCHED_DFLT_BW 0xFFFFFFFF /* unlimited */ | #define ICE_SCHED_DFLT_BW 0xFFFFFFFF /* unlimited */ | ||||
#define ICE_SCHED_NO_PRIORITY 0 | #define ICE_SCHED_NO_PRIORITY 0 | ||||
#define ICE_SCHED_NO_BW_WT 0 | #define ICE_SCHED_NO_BW_WT 0 | ||||
#define ICE_SCHED_DFLT_RL_PROF_ID 0 | #define ICE_SCHED_DFLT_RL_PROF_ID 0 | ||||
#define ICE_SCHED_NO_SHARED_RL_PROF_ID 0xFFFF | #define ICE_SCHED_NO_SHARED_RL_PROF_ID 0xFFFF | ||||
#define ICE_SCHED_DFLT_BW_WT 1 | #define ICE_SCHED_DFLT_BW_WT 4 | ||||
#define ICE_SCHED_INVAL_PROF_ID 0xFFFF | #define ICE_SCHED_INVAL_PROF_ID 0xFFFF | ||||
#define ICE_SCHED_DFLT_BURST_SIZE (15 * 1024) /* in bytes (15k) */ | #define ICE_SCHED_DFLT_BURST_SIZE (15 * 1024) /* in bytes (15k) */ | ||||
/* Access Macros for Tx Sched RL Profile data */ | /* Access Macros for Tx Sched RL Profile data */ | ||||
#define ICE_TXSCHED_GET_RL_PROF_ID(p) LE16_TO_CPU((p)->info.profile_id) | #define ICE_TXSCHED_GET_RL_PROF_ID(p) LE16_TO_CPU((p)->info.profile_id) | ||||
#define ICE_TXSCHED_GET_RL_MBS(p) LE16_TO_CPU((p)->info.max_burst_size) | #define ICE_TXSCHED_GET_RL_MBS(p) LE16_TO_CPU((p)->info.max_burst_size) | ||||
#define ICE_TXSCHED_GET_RL_MULTIPLIER(p) LE16_TO_CPU((p)->info.rl_multiply) | #define ICE_TXSCHED_GET_RL_MULTIPLIER(p) LE16_TO_CPU((p)->info.rl_multiply) | ||||
#define ICE_TXSCHED_GET_RL_WAKEUP_MV(p) LE16_TO_CPU((p)->info.wake_up_calc) | #define ICE_TXSCHED_GET_RL_WAKEUP_MV(p) LE16_TO_CPU((p)->info.wake_up_calc) | ||||
▲ Show 20 Lines • Show All 116 Lines • ▼ Show 20 Lines | struct ice_dcbx_cfg { | ||||
struct ice_dcb_app_priority_table app[ICE_DCBX_MAX_APPS]; | struct ice_dcb_app_priority_table app[ICE_DCBX_MAX_APPS]; | ||||
u8 dcbx_mode; | u8 dcbx_mode; | ||||
#define ICE_DCBX_MODE_CEE 0x1 | #define ICE_DCBX_MODE_CEE 0x1 | ||||
#define ICE_DCBX_MODE_IEEE 0x2 | #define ICE_DCBX_MODE_IEEE 0x2 | ||||
u8 app_mode; | u8 app_mode; | ||||
#define ICE_DCBX_APPS_NON_WILLING 0x1 | #define ICE_DCBX_APPS_NON_WILLING 0x1 | ||||
}; | }; | ||||
struct ice_qos_cfg { | |||||
struct ice_dcbx_cfg local_dcbx_cfg; /* Oper/Local Cfg */ | |||||
struct ice_dcbx_cfg desired_dcbx_cfg; /* CEE Desired Cfg */ | |||||
struct ice_dcbx_cfg remote_dcbx_cfg; /* Peer Cfg */ | |||||
u8 dcbx_status : 3; /* see ICE_DCBX_STATUS_DIS */ | |||||
u8 is_sw_lldp : 1; | |||||
}; | |||||
struct ice_port_info { | struct ice_port_info { | ||||
struct ice_sched_node *root; /* Root Node per Port */ | struct ice_sched_node *root; /* Root Node per Port */ | ||||
struct ice_hw *hw; /* back pointer to HW instance */ | struct ice_hw *hw; /* back pointer to HW instance */ | ||||
u32 last_node_teid; /* scheduler last node info */ | u32 last_node_teid; /* scheduler last node info */ | ||||
u16 sw_id; /* Initial switch ID belongs to port */ | u16 sw_id; /* Initial switch ID belongs to port */ | ||||
u16 pf_vf_num; | u16 pf_vf_num; | ||||
u8 port_state; | u8 port_state; | ||||
#define ICE_SCHED_PORT_STATE_INIT 0x0 | #define ICE_SCHED_PORT_STATE_INIT 0x0 | ||||
#define ICE_SCHED_PORT_STATE_READY 0x1 | #define ICE_SCHED_PORT_STATE_READY 0x1 | ||||
u8 lport; | u8 lport; | ||||
#define ICE_LPORT_MASK 0xff | #define ICE_LPORT_MASK 0xff | ||||
u16 dflt_tx_vsi_rule_id; | u16 dflt_tx_vsi_rule_id; | ||||
u16 dflt_tx_vsi_num; | u16 dflt_tx_vsi_num; | ||||
u16 dflt_rx_vsi_rule_id; | u16 dflt_rx_vsi_rule_id; | ||||
u16 dflt_rx_vsi_num; | u16 dflt_rx_vsi_num; | ||||
struct ice_fc_info fc; | struct ice_fc_info fc; | ||||
struct ice_mac_info mac; | struct ice_mac_info mac; | ||||
struct ice_phy_info phy; | struct ice_phy_info phy; | ||||
struct ice_lock sched_lock; /* protect access to TXSched tree */ | struct ice_lock sched_lock; /* protect access to TXSched tree */ | ||||
struct ice_sched_node * | struct ice_sched_node * | ||||
sib_head[ICE_MAX_TRAFFIC_CLASS][ICE_AQC_TOPO_MAX_LEVEL_NUM]; | sib_head[ICE_MAX_TRAFFIC_CLASS][ICE_AQC_TOPO_MAX_LEVEL_NUM]; | ||||
/* List contain profile ID(s) and other params per layer */ | /* List contain profile ID(s) and other params per layer */ | ||||
struct LIST_HEAD_TYPE rl_prof_list[ICE_AQC_TOPO_MAX_LEVEL_NUM]; | struct LIST_HEAD_TYPE rl_prof_list[ICE_AQC_TOPO_MAX_LEVEL_NUM]; | ||||
struct ice_bw_type_info root_node_bw_t_info; | |||||
struct ice_bw_type_info tc_node_bw_t_info[ICE_MAX_TRAFFIC_CLASS]; | struct ice_bw_type_info tc_node_bw_t_info[ICE_MAX_TRAFFIC_CLASS]; | ||||
struct ice_dcbx_cfg local_dcbx_cfg; /* Oper/Local Cfg */ | struct ice_qos_cfg qos_cfg; | ||||
/* DCBX info */ | |||||
struct ice_dcbx_cfg remote_dcbx_cfg; /* Peer Cfg */ | |||||
struct ice_dcbx_cfg desired_dcbx_cfg; /* CEE Desired Cfg */ | |||||
/* LLDP/DCBX Status */ | |||||
u8 dcbx_status:3; /* see ICE_DCBX_STATUS_DIS */ | |||||
u8 is_sw_lldp:1; | |||||
u8 is_vf:1; | u8 is_vf:1; | ||||
}; | }; | ||||
struct ice_switch_info { | struct ice_switch_info { | ||||
struct LIST_HEAD_TYPE vsi_list_map_head; | struct LIST_HEAD_TYPE vsi_list_map_head; | ||||
struct ice_sw_recipe *recp_list; | struct ice_sw_recipe *recp_list; | ||||
u16 prof_res_bm_init; | u16 prof_res_bm_init; | ||||
u16 max_used_prof_index; | |||||
ice_declare_bitmap(prof_res_bm[ICE_MAX_NUM_PROFILES], ICE_MAX_FV_WORDS); | ice_declare_bitmap(prof_res_bm[ICE_MAX_NUM_PROFILES], ICE_MAX_FV_WORDS); | ||||
}; | }; | ||||
/* Port hardware description */ | /* Port hardware description */ | ||||
struct ice_hw { | struct ice_hw { | ||||
u8 *hw_addr; | u8 *hw_addr; | ||||
void *back; | void *back; | ||||
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#define ICE_SR_CORER_REGS_AUTO_LOAD_PTR 0x3C | #define ICE_SR_CORER_REGS_AUTO_LOAD_PTR 0x3C | ||||
#define ICE_SR_PHY_CFG_SCRIPT_PTR 0x3D | #define ICE_SR_PHY_CFG_SCRIPT_PTR 0x3D | ||||
#define ICE_SR_PCIE_ALT_AUTO_LOAD_PTR 0x3E | #define ICE_SR_PCIE_ALT_AUTO_LOAD_PTR 0x3E | ||||
#define ICE_SR_SW_CHECKSUM_WORD 0x3F | #define ICE_SR_SW_CHECKSUM_WORD 0x3F | ||||
#define ICE_SR_PFA_PTR 0x40 | #define ICE_SR_PFA_PTR 0x40 | ||||
#define ICE_SR_1ST_SCRATCH_PAD_PTR 0x41 | #define ICE_SR_1ST_SCRATCH_PAD_PTR 0x41 | ||||
#define ICE_SR_1ST_NVM_BANK_PTR 0x42 | #define ICE_SR_1ST_NVM_BANK_PTR 0x42 | ||||
#define ICE_SR_NVM_BANK_SIZE 0x43 | #define ICE_SR_NVM_BANK_SIZE 0x43 | ||||
#define ICE_SR_1ND_OROM_BANK_PTR 0x44 | #define ICE_SR_1ST_OROM_BANK_PTR 0x44 | ||||
#define ICE_SR_OROM_BANK_SIZE 0x45 | #define ICE_SR_OROM_BANK_SIZE 0x45 | ||||
#define ICE_SR_NETLIST_BANK_PTR 0x46 | #define ICE_SR_NETLIST_BANK_PTR 0x46 | ||||
#define ICE_SR_NETLIST_BANK_SIZE 0x47 | #define ICE_SR_NETLIST_BANK_SIZE 0x47 | ||||
#define ICE_SR_EMP_SR_SETTINGS_PTR 0x48 | #define ICE_SR_EMP_SR_SETTINGS_PTR 0x48 | ||||
#define ICE_SR_CONFIGURATION_METADATA_PTR 0x4D | #define ICE_SR_CONFIGURATION_METADATA_PTR 0x4D | ||||
#define ICE_SR_IMMEDIATE_VALUES_PTR 0x4E | #define ICE_SR_IMMEDIATE_VALUES_PTR 0x4E | ||||
#define ICE_SR_LINK_DEFAULT_OVERRIDE_PTR 0x134 | #define ICE_SR_LINK_DEFAULT_OVERRIDE_PTR 0x134 | ||||
#define ICE_SR_POR_REGISTERS_AUTOLOAD_PTR 0x118 | #define ICE_SR_POR_REGISTERS_AUTOLOAD_PTR 0x118 | ||||
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/* | /* | ||||
* Defines for values in the VF_PE_DB_SIZE bits in the GLPCI_LBARCTRL register. | * Defines for values in the VF_PE_DB_SIZE bits in the GLPCI_LBARCTRL register. | ||||
* This is needed to determine the BAR0 space for the VFs | * This is needed to determine the BAR0 space for the VFs | ||||
*/ | */ | ||||
#define GLPCI_LBARCTRL_VF_PE_DB_SIZE_0KB 0x0 | #define GLPCI_LBARCTRL_VF_PE_DB_SIZE_0KB 0x0 | ||||
#define GLPCI_LBARCTRL_VF_PE_DB_SIZE_8KB 0x1 | #define GLPCI_LBARCTRL_VF_PE_DB_SIZE_8KB 0x1 | ||||
#define GLPCI_LBARCTRL_VF_PE_DB_SIZE_64KB 0x2 | #define GLPCI_LBARCTRL_VF_PE_DB_SIZE_64KB 0x2 | ||||
/* AQ API version for LLDP_FILTER_CONTROL */ | |||||
#define ICE_FW_API_LLDP_FLTR_MAJ 1 | |||||
#define ICE_FW_API_LLDP_FLTR_MIN 7 | |||||
#define ICE_FW_API_LLDP_FLTR_PATCH 1 | |||||
#endif /* _ICE_TYPE_H_ */ | #endif /* _ICE_TYPE_H_ */ |