Differential D5881 Diff 76727 head/sys/arm/allwinner/aw_usbphy.c

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head/sys/arm/allwinner/aw_usbphy.c

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DEFINE_CLASS_1(awusbphy_phynode, awusbphy_phynode_class, awusbphy_phynode_methods,		DEFINE_CLASS_1(awusbphy_phynode, awusbphy_phynode_class, awusbphy_phynode_methods,
sizeof(struct phynode_usb_sc), phynode_usb_class);		sizeof(struct phynode_usb_sc), phynode_usb_class);

#define RD4(res, o) bus_read_4(res, (o))		#define RD4(res, o) bus_read_4(res, (o))
#define WR4(res, o, v) bus_write_4(res, (o), (v))		#define WR4(res, o, v) bus_write_4(res, (o), (v))
#define CLR4(res, o, m) WR4(res, o, RD4(res, o) & ~(m))		#define CLR4(res, o, m) WR4(res, o, RD4(res, o) & ~(m))
#define SET4(res, o, m) WR4(res, o, RD4(res, o) \| (m))		#define SET4(res, o, m) WR4(res, o, RD4(res, o) \| (m))

		#define PHY_CSR 0x00
		#define ID_PULLUP_EN (1 << 17)
		#define DPDM_PULLUP_EN (1 << 16)
		#define FORCE_ID (0x3 << 14)
		#define FORCE_ID_SHIFT 14
		#define FORCE_ID_LOW 2
		#define FORCE_VBUS_VALID (0x3 << 12)
		#define FORCE_VBUS_VALID_SHIFT 12
		#define FORCE_VBUS_VALID_HIGH 3
		#define VBUS_CHANGE_DET (1 << 6)
		#define ID_CHANGE_DET (1 << 5)
		#define DPDM_CHANGE_DET (1 << 4)
#define OTG_PHY_CFG 0x20		#define OTG_PHY_CFG 0x20
#define OTG_PHY_ROUTE_OTG (1 << 0)		#define OTG_PHY_ROUTE_OTG (1 << 0)
#define PMU_IRQ_ENABLE 0x00		#define PMU_IRQ_ENABLE 0x00
#define PMU_AHB_INCR8 (1 << 10)		#define PMU_AHB_INCR8 (1 << 10)
#define PMU_AHB_INCR4 (1 << 9)		#define PMU_AHB_INCR4 (1 << 9)
#define PMU_AHB_INCRX_ALIGN (1 << 8)		#define PMU_AHB_INCRX_ALIGN (1 << 8)
#define PMU_ULPI_BYPASS (1 << 0)		#define PMU_ULPI_BYPASS (1 << 0)
#define PMU_UNK_H3 0x10		#define PMU_UNK_H3 0x10
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}		}

static int		static int
awusbphy_init(device_t dev)		awusbphy_init(device_t dev)
{		{
struct awusbphy_softc *sc;		struct awusbphy_softc *sc;
phandle_t node;		phandle_t node;
char pname[20];		char pname[20];
		uint32_t val;
int error, off, rid;		int error, off, rid;
regulator_t reg;		regulator_t reg;
hwreset_t rst;		hwreset_t rst;
clk_t clk;		clk_t clk;

sc = device_get_softc(dev);		sc = device_get_softc(dev);
node = ofw_bus_get_node(dev);		node = ofw_bus_get_node(dev);

▲ Show 20 Lines • Show All 58 Lines • ▼ Show 20 Lines	for (off = 0; off < sc->phy_conf->num_phys; off++) {

sc->pmu[off] = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,		sc->pmu[off] = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
RF_ACTIVE);		RF_ACTIVE);
if (sc->pmu[off] == NULL) {		if (sc->pmu[off] == NULL) {
device_printf(dev, "Cannot allocate resource\n");		device_printf(dev, "Cannot allocate resource\n");
return (ENXIO);		return (ENXIO);
}		}
}		}

		/* Enable OTG PHY for host mode */
		val = bus_read_4(sc->phy_ctrl, PHY_CSR);
		val &= ~(VBUS_CHANGE_DET \| ID_CHANGE_DET \| DPDM_CHANGE_DET);
		val \|= (ID_PULLUP_EN \| DPDM_PULLUP_EN);
		val &= ~FORCE_ID;
		val \|= (FORCE_ID_LOW << FORCE_ID_SHIFT);
		val &= ~FORCE_VBUS_VALID;
		val \|= (FORCE_VBUS_VALID_HIGH << FORCE_VBUS_VALID_SHIFT);
		bus_write_4(sc->phy_ctrl, PHY_CSR, val);

return (0);		return (0);
}		}

static int		static int
awusbphy_vbus_detect(device_t dev, int *val)		awusbphy_vbus_detect(device_t dev, int *val)
{		{
struct awusbphy_softc *sc;		struct awusbphy_softc *sc;
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