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sys/dev/pci/pcireg.h
Show First 20 Lines • Show All 1,092 Lines • ▼ Show 20 Lines | |||||
#define PCIM_OSC_SUPPORT_SEG_GROUP 0x08 /* PCI Segment Groups supported */ | #define PCIM_OSC_SUPPORT_SEG_GROUP 0x08 /* PCI Segment Groups supported */ | ||||
#define PCIM_OSC_SUPPORT_MSI 0x10 /* MSI signalling supported */ | #define PCIM_OSC_SUPPORT_MSI 0x10 /* MSI signalling supported */ | ||||
#define PCI_OSC_CTL 2 | #define PCI_OSC_CTL 2 | ||||
#define PCIM_OSC_CTL_PCIE_HP 0x01 /* PCIe Native Hot Plug */ | #define PCIM_OSC_CTL_PCIE_HP 0x01 /* PCIe Native Hot Plug */ | ||||
#define PCIM_OSC_CTL_SHPC_HP 0x02 /* SHPC Native Hot Plug */ | #define PCIM_OSC_CTL_SHPC_HP 0x02 /* SHPC Native Hot Plug */ | ||||
#define PCIM_OSC_CTL_PCIE_PME 0x04 /* PCIe Native Power Mgt Events */ | #define PCIM_OSC_CTL_PCIE_PME 0x04 /* PCIe Native Power Mgt Events */ | ||||
#define PCIM_OSC_CTL_PCIE_AER 0x08 /* PCIe Advanced Error Reporting */ | #define PCIM_OSC_CTL_PCIE_AER 0x08 /* PCIe Advanced Error Reporting */ | ||||
#define PCIM_OSC_CTL_PCIE_CAP_STRUCT 0x10 /* Various Capability Structures */ | #define PCIM_OSC_CTL_PCIE_CAP_STRUCT 0x10 /* Various Capability Structures */ | ||||
/* | |||||
* GVT-d definitions | |||||
*/ | |||||
#define IGD_DEVID_COFFEELAKE 0x3E00 /* 0x3Exx */ | |||||
#define IGD_DEVID_KABYLAKE 0x5900 /* 0x59xx */ | |||||
#define IGD_DEVID_SKYLAKE 0x1900 /* 0x1916 */ | |||||
#define PCIR_GGC 0x50 /* GMCH Graphics Control register */ | |||||
#define PCIR_BDSM 0x5C /* Base Data of Stolen Memory register */ | |||||
grehan: Is this the same as the value configured through BIOS ("DVMT Pre-Allocated" from the intro) ? | |||||
Done Inline ActionsYes, that's the "DVMT Pre-Allocated" setting. My updated revision detects this value. corvink: Yes, that's the "DVMT Pre-Allocated" setting.
My updated revision detects this value. | |||||
#define PCIR_ASLS_CTL 0xFC /* Opregion start address register */ | |||||
Done Inline ActionsDoes this value have to be fixed ? (ie.. for a 1:1 guest/host mapping) grehan: Does this value have to be fixed ? (ie.. for a 1:1 guest/host mapping) | |||||
Done Inline ActionsNormally this value is set to TOLUD - GSM_SIZE by BIOS. (TOLUD == Top of Low Usable DRAM) So, I think for bhyve it should be lowmem_limit - GSM_SIZE. The current implementation maps GPU_GSM_GPA into the PCI-Space (0xC0000000 - 0xE0000000) and works fine. Don't know if it's neccessary to set it to lowmem_limit - GSM_SIZE. corvink: Normally this value is set to //TOLUD - GSM_SIZE// by BIOS. (TOLUD == Top of Low Usable DRAM)… | |||||
#define PCIM_GGC_GMS_MASK 0x0000FF00 /* Bits 15:8 contain Graphics Mode Select */ | |||||
#define PCIM_BDSM_GSM_MASK 0xFFF00000 /* Bits 31:20 contain base address of gsm */ | |||||
#define PCIM_ASLS_OPREGION_MASK 0xFFFFF000 /* Opregion is 4k aligned */ | |||||
#define GPU_GSM_SIZE 0x04000000 /* Size of Graphics Stolen Memory (fallback if detection fails) */ | |||||
#define GPU_OPREGION_SIZE 0x00004000 /* Size of Opregion */ |
Is this the same as the value configured through BIOS ("DVMT Pre-Allocated" from the intro) ?
Any value in having this configurable ?