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Differential D25273 Diff 76104 sys/amd64/amd64/mp_machdep.c

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sys/amd64/amd64/mp_machdep.c

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#define CMOS_REG (0x70) #define CMOS_REG (0x70)
#define CMOS_DATA (0x71) #define CMOS_DATA (0x71)
#define BIOS_RESET (0x0f) #define BIOS_RESET (0x0f)
#define BIOS_WARM (0x0a) #define BIOS_WARM (0x0a)
#define GiB(v) (v ## ULL << 30) #define GiB(v) (v ## ULL << 30)
#define AP_BOOTPT_SZ (PAGE_SIZE * 3) #define AP_BOOTPT_SZ (PAGE_SIZE * 4)
/* Temporary variables for init_secondary() */ /* Temporary variables for init_secondary() */
char *doublefault_stack; char *doublefault_stack;
char *mce_stack; char *mce_stack;
char *nmi_stack; char *nmi_stack;
char *dbg_stack; char *dbg_stack;
extern u_int mptramp_la57;
/* /*
* Local data and functions. * Local data and functions.
*/ */
static int start_ap(int apic_id); static int start_ap(int apic_id);
static bool static bool
is_kernel_paddr(vm_paddr_t pa) is_kernel_paddr(vm_paddr_t pa)
▲ Show 20 Lines • Show All 120 Lines • ▼ Show 20 Lines if (boot_cpu_id == -1) {
KASSERT(boot_cpu_id == PCPU_GET(apic_id), KASSERT(boot_cpu_id == PCPU_GET(apic_id),
("BSP's APIC ID doesn't match boot_cpu_id")); ("BSP's APIC ID doesn't match boot_cpu_id"));
/* Probe logical/physical core configuration. */ /* Probe logical/physical core configuration. */
topo_probe(); topo_probe();
assign_cpu_ids(); assign_cpu_ids();
mptramp_la57 = la57;
/* Start each Application Processor */ /* Start each Application Processor */
init_ops.start_all_aps(); init_ops.start_all_aps();
set_interrupt_apic_ids(); set_interrupt_apic_ids();
#if defined(DEV_ACPI) && MAXMEMDOM > 1 #if defined(DEV_ACPI) && MAXMEMDOM > 1
acpi_pxm_set_cpu_locality(); acpi_pxm_set_cpu_locality();
#endif #endif
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#endif #endif
/* /*
* start each AP in our list * start each AP in our list
*/ */
int int
native_start_all_aps(void) native_start_all_aps(void)
{ {
u_int64_t *pt4, *pt3, *pt2; u_int64_t *pt5, *pt4, *pt3, *pt2;
u_int32_t mpbioswarmvec; u_int32_t mpbioswarmvec;
int apic_id, cpu, domain, i; int apic_id, cpu, domain, i, xo;
u_char mpbiosreason; u_char mpbiosreason;
mtx_init(&ap_boot_mtx, "ap boot", NULL, MTX_SPIN); mtx_init(&ap_boot_mtx, "ap boot", NULL, MTX_SPIN);
/* copy the AP 1st level boot code */ /* copy the AP 1st level boot code */
bcopy(mptramp_start, (void *)PHYS_TO_DMAP(boot_address), bootMP_size); bcopy(mptramp_start, (void *)PHYS_TO_DMAP(boot_address), bootMP_size);
/* Locate the page tables, they'll be below the trampoline */ /* Locate the page tables, they'll be below the trampoline */
pt4 = (uint64_t *)PHYS_TO_DMAP(mptramp_pagetables); if (la57) {
pt5 = (uint64_t *)PHYS_TO_DMAP(mptramp_pagetables);
xo = 1;
} else {
xo = 0;
}
pt4 = (uint64_t *)PHYS_TO_DMAP(mptramp_pagetables + xo * PAGE_SIZE);
pt3 = pt4 + (PAGE_SIZE) / sizeof(u_int64_t); pt3 = pt4 + (PAGE_SIZE) / sizeof(u_int64_t);
pt2 = pt3 + (PAGE_SIZE) / sizeof(u_int64_t); pt2 = pt3 + (PAGE_SIZE) / sizeof(u_int64_t);
/* Create the initial 1GB replicated page tables */ /* Create the initial 1GB replicated page tables */
for (i = 0; i < 512; i++) { for (i = 0; i < 512; i++) {
/* Each slot of the level 4 pages points to the same level 3 page */ if (la57) {
pt4[i] = (u_int64_t)(uintptr_t)(mptramp_pagetables + PAGE_SIZE); pt5[i] = (u_int64_t)(uintptr_t)(mptramp_pagetables +
PAGE_SIZE);
pt5[i] |= PG_V | PG_RW | PG_U;
}
/*
* Each slot of the level 4 pages points to the same
* level 3 page.
*/
pt4[i] = (u_int64_t)(uintptr_t)(mptramp_pagetables +
(xo + 1) * PAGE_SIZE);
pt4[i] |= PG_V | PG_RW | PG_U; pt4[i] |= PG_V | PG_RW | PG_U;
/* Each slot of the level 3 pages points to the same level 2 page */ /*
pt3[i] = (u_int64_t)(uintptr_t)(mptramp_pagetables + (2 * PAGE_SIZE)); * Each slot of the level 3 pages points to the same
* level 2 page.
*/
pt3[i] = (u_int64_t)(uintptr_t)(mptramp_pagetables +
((xo + 2) * PAGE_SIZE));
pt3[i] |= PG_V | PG_RW | PG_U; pt3[i] |= PG_V | PG_RW | PG_U;
/* The level 2 page slots are mapped with 2MB pages for 1GB. */ /* The level 2 page slots are mapped with 2MB pages for 1GB. */
pt2[i] = i * (2 * 1024 * 1024); pt2[i] = i * (2 * 1024 * 1024);
pt2[i] |= PG_V | PG_RW | PG_PS | PG_U; pt2[i] |= PG_V | PG_RW | PG_PS | PG_U;
} }
/* save the current value of the warm-start vector */ /* save the current value of the warm-start vector */
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