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Differential D24217 Diff 75483 sys/amd64/include/pmap.h

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sys/amd64/include/pmap.h

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#define PMAP_UCR3_NOMASK (~0UL) #define PMAP_UCR3_NOMASK (~0UL)
#ifndef LOCORE #ifndef LOCORE
#include <sys/queue.h> #include <sys/queue.h>
#include <sys/_cpuset.h> #include <sys/_cpuset.h>
#include <sys/_lock.h> #include <sys/_lock.h>
#include <sys/_mutex.h> #include <sys/_mutex.h>
#include <sys/_obm.h>
#include <sys/_pctrie.h> #include <sys/_pctrie.h>
#include <sys/_rangeset.h> #include <sys/_rangeset.h>
#include <vm/_vm_radix.h> #include <vm/_vm_radix.h>
typedef u_int64_t pd_entry_t; typedef u_int64_t pd_entry_t;
typedef u_int64_t pt_entry_t; typedef u_int64_t pt_entry_t;
typedef u_int64_t pdp_entry_t; typedef u_int64_t pdp_entry_t;
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/* /*
* Locks * Locks
* (p) PV list lock * (p) PV list lock
*/ */
struct md_page { struct md_page {
TAILQ_HEAD(, pv_entry) pv_list; /* (p) */ TAILQ_HEAD(, pv_entry) pv_list; /* (p) */
int pv_gen; /* (p) */ int pv_gen; /* (p) */
int pat_mode; obm_lock_t pv_lock;
uint8_t pat_mode;
uint8_t pad0[2];
}; };
enum pmap_type { enum pmap_type {
PT_X86, /* regular x86 page tables */ PT_X86, /* regular x86 page tables */
PT_EPT, /* Intel's nested page tables */ PT_EPT, /* Intel's nested page tables */
PT_RVI, /* AMD's nested page tables */ PT_RVI, /* AMD's nested page tables */
}; };
struct pmap_pcids { struct pmap_pcids {
uint32_t pm_pcid; uint32_t pm_pcid;
uint32_t pm_gen; uint32_t pm_gen;
}; };
TAILQ_HEAD(pvchunks, pv_chunk);
/* /*
* The kernel virtual address (KVA) of the level 4 page table page is always * The kernel virtual address (KVA) of the level 4 page table page is always
* within the direct map (DMAP) region. * within the direct map (DMAP) region.
*/ */
struct pmap { struct pmap {
struct mtx pm_mtx; struct mtx pm_mtx;
pml4_entry_t *pm_pml4; /* KVA of level 4 page table */ pml4_entry_t *pm_pml4; /* KVA of level 4 page table */
pml4_entry_t *pm_pml4u; /* KVA of user l4 page table */ pml4_entry_t *pm_pml4u; /* KVA of user l4 page table */
uint64_t pm_cr3; uint64_t pm_cr3;
uint64_t pm_ucr3; uint64_t pm_ucr3;
TAILQ_HEAD(,pv_chunk) pm_pvchunk; /* list of mappings in pmap */ struct pvchunks pm_pvchunk; /* list of mappings in pmap */
cpuset_t pm_active; /* active on cpus */ cpuset_t pm_active; /* active on cpus */
enum pmap_type pm_type; /* regular or nested tables */ enum pmap_type pm_type; /* regular or nested tables */
struct pmap_statistics pm_stats; /* pmap statistics */ struct pmap_statistics pm_stats; /* pmap statistics */
struct vm_radix pm_root; /* spare page table pages */ struct vm_radix pm_root; /* spare page table pages */
long pm_eptgen; /* EPT pmap generation id */ long pm_eptgen; /* EPT pmap generation id */
int pm_flags; int pm_flags;
struct pmap_pcids pm_pcids[MAXCPU]; struct pmap_pcids pm_pcids[MAXCPU];
struct rangeset pm_pkru; struct rangeset pm_pkru;
TAILQ_ENTRY(pmap) pm_allpmaps;
}; };
/* flags */ /* flags */
#define PMAP_NESTED_IPIMASK 0xff #define PMAP_NESTED_IPIMASK 0xff
#define PMAP_PDE_SUPERPAGE (1 << 8) /* supports 2MB superpages */ #define PMAP_PDE_SUPERPAGE (1 << 8) /* supports 2MB superpages */
#define PMAP_EMULATE_AD_BITS (1 << 9) /* needs A/D bits emulation */ #define PMAP_EMULATE_AD_BITS (1 << 9) /* needs A/D bits emulation */
#define PMAP_SUPPORTS_EXEC_ONLY (1 << 10) /* execute only mappings ok */ #define PMAP_SUPPORTS_EXEC_ONLY (1 << 10) /* execute only mappings ok */
typedef struct pmap *pmap_t; typedef struct pmap *pmap_t;
#ifdef _KERNEL #ifdef _KERNEL
extern struct pmap kernel_pmap_store; extern struct pmap kernel_pmap_store;
#define kernel_pmap (&kernel_pmap_store) #define kernel_pmap (&kernel_pmap_store)
#define PMAP_LOCK(pmap) mtx_lock(&(pmap)->pm_mtx) #define PMAP_LOCK(pmap) mtx_lock(&(pmap)->pm_mtx)
#define PMAP_LOCK_ASSERT(pmap, type) \ #define PMAP_LOCK_ASSERT(pmap, type) \
mtx_assert(&(pmap)->pm_mtx, (type)) mtx_assert(&(pmap)->pm_mtx, (type))
#define PMAP_LOCK_DESTROY(pmap) mtx_destroy(&(pmap)->pm_mtx) #define PMAP_LOCK_DESTROY(pmap) mtx_destroy(&(pmap)->pm_mtx)
#define PMAP_LOCK_INIT(pmap) mtx_init(&(pmap)->pm_mtx, "pmap", \ #define PMAP_LOCK_INIT(pmap) pmap_lock_init(pmap)
NULL, MTX_DEF | MTX_DUPOK)
#define PMAP_LOCKED(pmap) mtx_owned(&(pmap)->pm_mtx) #define PMAP_LOCKED(pmap) mtx_owned(&(pmap)->pm_mtx)
#define PMAP_MTX(pmap) (&(pmap)->pm_mtx) #define PMAP_MTX(pmap) (&(pmap)->pm_mtx)
#define PMAP_TRYLOCK(pmap) mtx_trylock(&(pmap)->pm_mtx) #define PMAP_TRYLOCK(pmap) mtx_trylock(&(pmap)->pm_mtx)
#define PMAP_UNLOCK(pmap) mtx_unlock(&(pmap)->pm_mtx) #define PMAP_UNLOCK(pmap) mtx_unlock(&(pmap)->pm_mtx)
int pmap_pinit_type(pmap_t pmap, enum pmap_type pm_type, int flags); int pmap_pinit_type(pmap_t pmap, enum pmap_type pm_type, int flags);
int pmap_emulate_accessed_dirty(pmap_t pmap, vm_offset_t va, int ftype); int pmap_emulate_accessed_dirty(pmap_t pmap, vm_offset_t va, int ftype);
#endif #endif
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* pv_entries are allocated in chunks per-process. This avoids the * pv_entries are allocated in chunks per-process. This avoids the
* need to track per-pmap assignments. * need to track per-pmap assignments.
*/ */
#define _NPCM 3 #define _NPCM 3
#define _NPCPV 168 #define _NPCPV 168
#define PV_CHUNK_HEADER \ #define PV_CHUNK_HEADER \
pmap_t pc_pmap; \ pmap_t pc_pmap; \
TAILQ_ENTRY(pv_chunk) pc_list; \ TAILQ_ENTRY(pv_chunk) pc_list; \
uint64_t pc_map[_NPCM]; /* bitmap; 1 = free */ \ uint64_t pc_map[_NPCM]; /* bitmap; 1 = free */
TAILQ_ENTRY(pv_chunk) pc_lru;
struct pv_chunk_header { struct pv_chunk_header {
PV_CHUNK_HEADER PV_CHUNK_HEADER
}; };
struct pv_chunk { struct pv_chunk {
PV_CHUNK_HEADER PV_CHUNK_HEADER
struct pv_entry pc_pventry[_NPCPV]; struct pv_entry pc_pventry[_NPCPV];
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void pmap_init_pat(void); void pmap_init_pat(void);
void pmap_kenter(vm_offset_t va, vm_paddr_t pa); void pmap_kenter(vm_offset_t va, vm_paddr_t pa);
void *pmap_kenter_temporary(vm_paddr_t pa, int i); void *pmap_kenter_temporary(vm_paddr_t pa, int i);
vm_paddr_t pmap_kextract(vm_offset_t); vm_paddr_t pmap_kextract(vm_offset_t);
void pmap_kremove(vm_offset_t); void pmap_kremove(vm_offset_t);
int pmap_large_map(vm_paddr_t, vm_size_t, void **, vm_memattr_t); int pmap_large_map(vm_paddr_t, vm_size_t, void **, vm_memattr_t);
void pmap_large_map_wb(void *sva, vm_size_t len); void pmap_large_map_wb(void *sva, vm_size_t len);
void pmap_large_unmap(void *sva, vm_size_t len); void pmap_large_unmap(void *sva, vm_size_t len);
void pmap_lock_init(pmap_t pmap);
void *pmap_mapbios(vm_paddr_t, vm_size_t); void *pmap_mapbios(vm_paddr_t, vm_size_t);
void *pmap_mapdev(vm_paddr_t, vm_size_t); void *pmap_mapdev(vm_paddr_t, vm_size_t);
void *pmap_mapdev_attr(vm_paddr_t, vm_size_t, int); void *pmap_mapdev_attr(vm_paddr_t, vm_size_t, int);
void *pmap_mapdev_pciecfg(vm_paddr_t pa, vm_size_t size); void *pmap_mapdev_pciecfg(vm_paddr_t pa, vm_size_t size);
bool pmap_not_in_di(void); bool pmap_not_in_di(void);
boolean_t pmap_page_is_mapped(vm_page_t m); boolean_t pmap_page_is_mapped(vm_page_t m);
void pmap_page_set_memattr(vm_page_t m, vm_memattr_t ma); void pmap_page_set_memattr(vm_page_t m, vm_memattr_t ma);
void pmap_pinit_pml4(vm_page_t); void pmap_pinit_pml4(vm_page_t);
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