Differential D25894 Diff 75235 head/sys/x86/iommu/intel_idpgtbl.c

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head/sys/x86/iommu/intel_idpgtbl.c

Show First 20 Lines • Show All 492 Lines • ▼ Show 20 Lines	for (sf = NULL, pi = 0; size > 0; base += pg_sz, size -= pg_sz,
sf_buf_page(sf)->ref_count += 1;		sf_buf_page(sf)->ref_count += 1;
}		}
if (sf != NULL)		if (sf != NULL)
dmar_unmap_pgtbl(sf);		dmar_unmap_pgtbl(sf);
TD_PINNED_ASSERT;		TD_PINNED_ASSERT;
return (0);		return (0);
}		}

int		static int
domain_map_buf(struct iommu_domain *iodom, iommu_gaddr_t base,		domain_map_buf(struct iommu_domain *iodom, iommu_gaddr_t base,
iommu_gaddr_t size, vm_page_t *ma, uint64_t eflags, int flags)		iommu_gaddr_t size, vm_page_t *ma, uint64_t eflags, int flags)
{		{
struct dmar_domain *domain;		struct dmar_domain *domain;
struct dmar_unit *unit;		struct dmar_unit *unit;
uint64_t pflags;		uint64_t pflags;
int error;		int error;

▲ Show 20 Lines • Show All 169 Lines • ▼ Show 20 Lines	domain_unmap_buf_locked(struct dmar_domain *domain, iommu_gaddr_t base,
* See 11.1 Write Buffer Flushing for an explanation why RWBF		* See 11.1 Write Buffer Flushing for an explanation why RWBF
* can be ignored there.		* can be ignored there.
*/		*/

TD_PINNED_ASSERT;		TD_PINNED_ASSERT;
return (0);		return (0);
}		}

int		static int
domain_unmap_buf(struct dmar_domain *domain, iommu_gaddr_t base,		domain_unmap_buf(struct iommu_domain *iodom, iommu_gaddr_t base,
iommu_gaddr_t size, int flags)		iommu_gaddr_t size, int flags)
{		{
		struct dmar_domain *domain;
int error;		int error;

		domain = (struct dmar_domain *)iodom;

DMAR_DOMAIN_PGLOCK(domain);		DMAR_DOMAIN_PGLOCK(domain);
error = domain_unmap_buf_locked(domain, base, size, flags);		error = domain_unmap_buf_locked(domain, base, size, flags);
DMAR_DOMAIN_PGUNLOCK(domain);		DMAR_DOMAIN_PGUNLOCK(domain);
return (error);		return (error);
}		}

int		int
domain_alloc_pgtbl(struct dmar_domain *domain)		domain_alloc_pgtbl(struct dmar_domain *domain)
▲ Show 20 Lines • Show All 102 Lines • ▼ Show 20 Lines	for (; size > 0; base += isize, size -= isize) {
* address space for the domain.		* address space for the domain.
*/		*/
if ((iotlbr & DMAR_IOTLB_IAIG_MASK) !=		if ((iotlbr & DMAR_IOTLB_IAIG_MASK) !=
DMAR_IOTLB_IAIG_PAGE)		DMAR_IOTLB_IAIG_PAGE)
break;		break;
}		}
}		}
DMAR_UNLOCK(unit);		DMAR_UNLOCK(unit);
		}

		static const struct iommu_domain_map_ops dmar_domain_map_ops = {
		.map = domain_map_buf,
		.unmap = domain_unmap_buf,
		};

		void
		domain_pgtbl_init(struct dmar_domain *domain)
		{
		struct iommu_domain *iodom;

		iodom = (struct iommu_domain *)domain;
		iodom->ops = &dmar_domain_map_ops;
}		}