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head/sys/x86/iommu/intel_drv.c
| Show First 20 Lines • Show All 170 Lines • ▼ Show 20 Lines | dmar_identify(driver_t *driver, device_t parent) | ||||
| int i, error; | int i, error; | ||||
| if (acpi_disabled("dmar")) | if (acpi_disabled("dmar")) | ||||
| return; | return; | ||||
| TUNABLE_INT_FETCH("hw.dmar.enable", &dmar_enable); | TUNABLE_INT_FETCH("hw.dmar.enable", &dmar_enable); | ||||
| if (!dmar_enable) | if (!dmar_enable) | ||||
| return; | return; | ||||
| #ifdef INVARIANTS | #ifdef INVARIANTS | ||||
| TUNABLE_INT_FETCH("hw.dmar.check_free", &dmar_check_free); | TUNABLE_INT_FETCH("hw.iommu.check_free", &iommu_check_free); | ||||
| #endif | #endif | ||||
| status = AcpiGetTable(ACPI_SIG_DMAR, 1, (ACPI_TABLE_HEADER **)&dmartbl); | status = AcpiGetTable(ACPI_SIG_DMAR, 1, (ACPI_TABLE_HEADER **)&dmartbl); | ||||
| if (ACPI_FAILURE(status)) | if (ACPI_FAILURE(status)) | ||||
| return; | return; | ||||
| haw = dmartbl->Width + 1; | haw = dmartbl->Width + 1; | ||||
| if ((1ULL << (haw + 1)) > BUS_SPACE_MAXADDR) | if ((1ULL << (haw + 1)) > BUS_SPACE_MAXADDR) | ||||
| dmar_high = BUS_SPACE_MAXADDR; | dmar_high = BUS_SPACE_MAXADDR; | ||||
| else | else | ||||
| ▲ Show 20 Lines • Show All 752 Lines • ▼ Show 20 Lines | dmar_rmrr_iter(ACPI_DMAR_HEADER *dmarh, void *arg) | ||||
| for (;;) { | for (;;) { | ||||
| if (ptr >= ptrend) | if (ptr >= ptrend) | ||||
| break; | break; | ||||
| devscope = (ACPI_DMAR_DEVICE_SCOPE *)ptr; | devscope = (ACPI_DMAR_DEVICE_SCOPE *)ptr; | ||||
| ptr += devscope->Length; | ptr += devscope->Length; | ||||
| match = dmar_match_devscope(devscope, ria->dev_busno, | match = dmar_match_devscope(devscope, ria->dev_busno, | ||||
| ria->dev_path, ria->dev_path_len); | ria->dev_path, ria->dev_path_len); | ||||
| if (match == 1) { | if (match == 1) { | ||||
| entry = dmar_gas_alloc_entry(ria->domain, | entry = iommu_gas_alloc_entry( | ||||
| (struct iommu_domain *)ria->domain, | |||||
| DMAR_PGF_WAITOK); | DMAR_PGF_WAITOK); | ||||
| entry->start = resmem->BaseAddress; | entry->start = resmem->BaseAddress; | ||||
| /* The RMRR entry end address is inclusive. */ | /* The RMRR entry end address is inclusive. */ | ||||
| entry->end = resmem->EndAddress; | entry->end = resmem->EndAddress; | ||||
| TAILQ_INSERT_TAIL(ria->rmrr_entries, entry, | TAILQ_INSERT_TAIL(ria->rmrr_entries, entry, | ||||
| unroll_link); | unroll_link); | ||||
| } | } | ||||
| } | } | ||||
| ▲ Show 20 Lines • Show All 190 Lines • ▼ Show 20 Lines | db_printf( | ||||
| pci_get_slot(ctx->context.tag->owner), | pci_get_slot(ctx->context.tag->owner), | ||||
| pci_get_function(ctx->context.tag->owner), ctx->refs, | pci_get_function(ctx->context.tag->owner), ctx->refs, | ||||
| ctx->context.flags, ctx->context.loads, ctx->context.unloads); | ctx->context.flags, ctx->context.loads, ctx->context.unloads); | ||||
| } | } | ||||
| static void | static void | ||||
| dmar_print_domain(struct dmar_domain *domain, bool show_mappings) | dmar_print_domain(struct dmar_domain *domain, bool show_mappings) | ||||
| { | { | ||||
| struct iommu_domain *iodom; | |||||
| struct iommu_map_entry *entry; | struct iommu_map_entry *entry; | ||||
| struct dmar_ctx *ctx; | struct dmar_ctx *ctx; | ||||
| iodom = (struct iommu_domain *)domain; | |||||
| db_printf( | db_printf( | ||||
| " @%p dom %d mgaw %d agaw %d pglvl %d end %jx refs %d\n" | " @%p dom %d mgaw %d agaw %d pglvl %d end %jx refs %d\n" | ||||
| " ctx_cnt %d flags %x pgobj %p map_ents %u\n", | " ctx_cnt %d flags %x pgobj %p map_ents %u\n", | ||||
| domain, domain->domain, domain->mgaw, domain->agaw, domain->pglvl, | domain, domain->domain, domain->mgaw, domain->agaw, domain->pglvl, | ||||
| (uintmax_t)domain->end, domain->refs, domain->ctx_cnt, | (uintmax_t)domain->iodom.end, domain->refs, domain->ctx_cnt, | ||||
| domain->flags, domain->pgtbl_obj, domain->iodom.entries_cnt); | domain->iodom.flags, domain->pgtbl_obj, domain->iodom.entries_cnt); | ||||
| if (!LIST_EMPTY(&domain->contexts)) { | if (!LIST_EMPTY(&domain->contexts)) { | ||||
| db_printf(" Contexts:\n"); | db_printf(" Contexts:\n"); | ||||
| LIST_FOREACH(ctx, &domain->contexts, link) | LIST_FOREACH(ctx, &domain->contexts, link) | ||||
| dmar_print_ctx(ctx); | dmar_print_ctx(ctx); | ||||
| } | } | ||||
| if (!show_mappings) | if (!show_mappings) | ||||
| return; | return; | ||||
| db_printf(" mapped:\n"); | db_printf(" mapped:\n"); | ||||
| RB_FOREACH(entry, dmar_gas_entries_tree, &domain->rb_root) { | RB_FOREACH(entry, iommu_gas_entries_tree, &iodom->rb_root) { | ||||
| dmar_print_domain_entry(entry); | dmar_print_domain_entry(entry); | ||||
| if (db_pager_quit) | if (db_pager_quit) | ||||
| break; | break; | ||||
| } | } | ||||
| if (db_pager_quit) | if (db_pager_quit) | ||||
| return; | return; | ||||
| db_printf(" unloading:\n"); | db_printf(" unloading:\n"); | ||||
| TAILQ_FOREACH(entry, &domain->iodom.unload_entries, dmamap_link) { | TAILQ_FOREACH(entry, &domain->iodom.unload_entries, dmamap_link) { | ||||
| ▲ Show 20 Lines • Show All 182 Lines • Show Last 20 Lines | |||||