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Show First 20 Lines • Show All 216 Lines • ▼ Show 20 Lines	static const struct intel_dmar_quirk_cpu post_ident_cpu[] = {
{		{
.ext_family = 0, .ext_model = 2, .family_code = 6, .model = 13,		.ext_family = 0, .ext_model = 2, .family_code = 6, .model = 13,
.stepping = 6, .quirk = cpu_e5_am9,		.stepping = 6, .quirk = cpu_e5_am9,
.descr = "E5 BT176" /* AM should be at most 9 */		.descr = "E5 BT176" /* AM should be at most 9 */
},		},
};		};

void		void
dmar_quirks_pre_use(struct dmar_unit *dmar)		dmar_quirks_pre_use(struct iommu_unit *unit)
{		{
		struct dmar_unit *dmar;

		dmar = (struct dmar_unit *)unit;

if (!dmar_barrier_enter(dmar, DMAR_BARRIER_USEQ))		if (!dmar_barrier_enter(dmar, DMAR_BARRIER_USEQ))
return;		return;
DMAR_LOCK(dmar);		DMAR_LOCK(dmar);
dmar_match_quirks(dmar, pre_use_nb, nitems(pre_use_nb),		dmar_match_quirks(dmar, pre_use_nb, nitems(pre_use_nb),
NULL, 0);		NULL, 0);
dmar_barrier_exit(dmar, DMAR_BARRIER_USEQ);		dmar_barrier_exit(dmar, DMAR_BARRIER_USEQ);
}		}

void		void
dmar_quirks_post_ident(struct dmar_unit *dmar)		dmar_quirks_post_ident(struct dmar_unit *dmar)
{		{

dmar_match_quirks(dmar, NULL, 0, post_ident_cpu,		dmar_match_quirks(dmar, NULL, 0, post_ident_cpu,
nitems(post_ident_cpu));		nitems(post_ident_cpu));
}		}