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head/sys/crypto/aesni/aesni.c
Show First 20 Lines • Show All 174 Lines • ▼ Show 20 Lines | aesni_attach(device_t dev) | ||||
} | } | ||||
ctx_mtx = malloc(sizeof *ctx_mtx * (mp_maxid + 1), M_AESNI, | ctx_mtx = malloc(sizeof *ctx_mtx * (mp_maxid + 1), M_AESNI, | ||||
M_WAITOK|M_ZERO); | M_WAITOK|M_ZERO); | ||||
ctx_fpu = malloc(sizeof *ctx_fpu * (mp_maxid + 1), M_AESNI, | ctx_fpu = malloc(sizeof *ctx_fpu * (mp_maxid + 1), M_AESNI, | ||||
M_WAITOK|M_ZERO); | M_WAITOK|M_ZERO); | ||||
CPU_FOREACH(i) { | CPU_FOREACH(i) { | ||||
ctx_fpu[i] = fpu_kern_alloc_ctx(0); | #ifdef __amd64__ | ||||
ctx_fpu[i] = fpu_kern_alloc_ctx_domain( | |||||
pcpu_find(i)->pc_domain, FPU_KERN_NORMAL); | |||||
#else | |||||
ctx_fpu[i] = fpu_kern_alloc_ctx(FPU_KERN_NORMAL); | |||||
#endif | |||||
mtx_init(&ctx_mtx[i], "anifpumtx", NULL, MTX_DEF|MTX_NEW); | mtx_init(&ctx_mtx[i], "anifpumtx", NULL, MTX_DEF|MTX_NEW); | ||||
} | } | ||||
detect_cpu_features(&sc->has_aes, &sc->has_sha); | detect_cpu_features(&sc->has_aes, &sc->has_sha); | ||||
return (0); | return (0); | ||||
} | } | ||||
static int | static int | ||||
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