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Show First 20 Lines • Show All 1,138 Lines • ▼ Show 20 Lines	case 0x01: /* return Identify Controller data structure */
nvme_prp_memcpy(sc->nsc_pi->pi_vmctx, command->prp1,		nvme_prp_memcpy(sc->nsc_pi->pi_vmctx, command->prp1,
command->prp2, (uint8_t *)&sc->ctrldata,		command->prp2, (uint8_t *)&sc->ctrldata,
sizeof(sc->ctrldata),		sizeof(sc->ctrldata),
NVME_COPY_TO_PRP);		NVME_COPY_TO_PRP);
break;		break;
case 0x02: /* list of 1024 active NSIDs > CDW1.NSID */		case 0x02: /* list of 1024 active NSIDs > CDW1.NSID */
dest = vm_map_gpa(sc->nsc_pi->pi_vmctx, command->prp1,		dest = vm_map_gpa(sc->nsc_pi->pi_vmctx, command->prp1,
sizeof(uint32_t) * 1024);		sizeof(uint32_t) * 1024);
		/* All unused entries shall be zero */
		bzero(dest, sizeof(uint32_t) * 1024);
((uint32_t *)dest)[0] = 1;		((uint32_t *)dest)[0] = 1;
((uint32_t *)dest)[1] = 0;
break;		break;
case 0x03: /* list of NSID structures in CDW1.NSID, 4096 bytes */		case 0x03: /* list of NSID structures in CDW1.NSID, 4096 bytes */
if (command->nsid != 1) {		if (command->nsid != 1) {
pci_nvme_status_genc(&status,		pci_nvme_status_genc(&status,
NVME_SC_INVALID_NAMESPACE_OR_FORMAT);		NVME_SC_INVALID_NAMESPACE_OR_FORMAT);
break;		break;
}		}
dest = vm_map_gpa(sc->nsc_pi->pi_vmctx, command->prp1,		dest = vm_map_gpa(sc->nsc_pi->pi_vmctx, command->prp1,
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