Differential D25118 Diff 72618 sys/arm/ti/ti_clk_clkctrl.c

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sys/arm/ti/ti_clk_clkctrl.c

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				/*-
				* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
				*
				* Copyright (c) 2020 Oskar Holmlund <oskar.holmlund@ohdata.se>
				*
				* Redistribution and use in source and binary forms, with or without
				* modification, are permitted provided that the following conditions
				* are met:
				* 1. Redistributions of source code must retain the above copyright
				* notice, this list of conditions and the following disclaimer.
				* 2. Redistributions in binary form must reproduce the above copyright
				* notice, this list of conditions and the following disclaimer in the
				* documentation and/or other materials provided with the distribution.
				*
				* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
				* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
				* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
				* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
				* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
				* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
				* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
				* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
				* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
				* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
				* SUCH DAMAGE.
				*
				* $FreeBSD$
				*/

				#include <sys/cdefs.h>
				__FBSDID("$FreeBSD$");

				#include <sys/param.h>
				#include <sys/systm.h>
				#include <sys/bus.h>
				#include <sys/malloc.h>

				#include <dev/extres/clk/clk.h>

				#include <arm/ti/ti_clk_clkctrl.h>

				#include "clkdev_if.h"

				#if 0
				#define DPRINTF(dev, msg...) device_printf(dev, msg)
				#else
				#define DPRINTF(dev, msg...)
				#endif

				/*
				* clknode for clkctrl, implements gate and mux (for gpioc)
				*/

				#define GPIO_X_GDBCLK_MASK 0x00040000
				#define IDLEST_MASK 0x00030000
				#define MODULEMODE_MASK 0x00000003

				#define GPIOX_GDBCLK_ENABLE 0x00040000
				#define GPIOX_GDBCLK_DISABLE 0x00000000

				#define MODULEMODE_DISABLE 0x0
				#define MODULEMODE_ENABLE 0x2

				struct ti_clkctrl_clknode_sc {
				device_t dev;
				uint32_t register_offset; /* omap4-cm range.host + ti,clkctrl reg[0] */
				};

				#define WRITE4(_clk, off, val) \
				CLKDEV_WRITE_4(clknode_get_device(_clk), off, val)
				#define READ4(_clk, off, val) \
				CLKDEV_READ_4(clknode_get_device(_clk), off, val)
				#define DEVICE_LOCK(_clk) \
				CLKDEV_DEVICE_LOCK(clknode_get_device(_clk))
				#define DEVICE_UNLOCK(_clk) \
				CLKDEV_DEVICE_UNLOCK(clknode_get_device(_clk))

				static int
				ti_clkctrl_init(struct clknode *clk, device_t dev)
				{
				struct ti_clkctrl_clknode_sc *sc;

				sc = clknode_get_softc(clk);
				sc->dev = dev;

				clknode_init_parent_idx(clk, 0);
				return (0);
				}

				static int
				ti_clkctrl_set_mux(struct clknode *clk, int idx)
				{
				struct ti_clkctrl_clknode_sc *sc;
				uint32_t val;
				uint32_t timeout = 100;
				intptr_t clk_id;

				sc = clknode_get_softc(clk);
				clk_id = clknode_get_id(clk);
				DPRINTF(sc->dev, "ti_clkctrl_set_mux(reg %x id %d, 0x%x)\n",
				sc->register_offset, clk_id, idx);

				READ4(clk, sc->register_offset, &val);
				DPRINTF(sc->dev, "val(%x) & (%x \| %x = %x)\n",
				val, GPIO_X_GDBCLK_MASK, MODULEMODE_MASK,
				GPIO_X_GDBCLK_MASK \| MODULEMODE_MASK);

				val = val & (GPIO_X_GDBCLK_MASK \| MODULEMODE_MASK);
				val \|= GPIOX_GDBCLK_ENABLE;

				DPRINTF(sc->dev, "val %x\n", val);
				WRITE4(clk, sc->register_offset, val);

				/* Wait */
				READ4(clk, sc->register_offset, &val);
				while ((val & GPIO_X_GDBCLK_MASK) && timeout--) {
				DELAY(10);
				READ4(clk, sc->register_offset, &val);
				}
				if (timeout == 0) {
				device_printf(sc->dev, "ti_clkctrl_set_mux: Timeout\n");
				return (1);
				}

				return (0);
				}

				static int
				ti_clkctrl_set_gate(struct clknode *clk, bool enable)
				{
				struct ti_clkctrl_clknode_sc *sc;
				uint32_t val;
				intptr_t clk_id;
				uint32_t timeout=100;

				sc = clknode_get_softc(clk);
				clk_id = clknode_get_id(clk);

				READ4(clk, sc->register_offset, &val);

				if (enable)
				WRITE4(clk, sc->register_offset, MODULEMODE_ENABLE);
				else
				WRITE4(clk, sc->register_offset, MODULEMODE_DISABLE);

				while (timeout) {
				READ4(clk, sc->register_offset, &val);
				if (enable &&
				(val & IDLEST_MASK) == 0x0 &&
				(val & MODULEMODE_MASK) == MODULEMODE_ENABLE)
				break;
				else if (!enable &&
				(val & IDLEST_MASK) == 0x3 &&
				(val & MODULEMODE_MASK) == MODULEMODE_DISABLE)
				break;
				DELAY(10);
				timeout--;
				}
				if (timeout == 0) {
				device_printf(sc->dev, "ti_clkctrl_set_gate: Timeout\n");
				return (1);
				}

				return (0);
				}

				static clknode_method_t ti_clkctrl_clknode_methods[] = {
				/* Device interface */
				CLKNODEMETHOD(clknode_init, ti_clkctrl_init),
				CLKNODEMETHOD(clknode_set_mux, ti_clkctrl_set_mux),
				CLKNODEMETHOD(clknode_set_gate, ti_clkctrl_set_gate),
				CLKNODEMETHOD_END
				};

				DEFINE_CLASS_1(ti_clkctrl_clknode, ti_clkctrl_clknode_class, ti_clkctrl_clknode_methods,
				sizeof(struct ti_clkctrl_clknode_sc), clknode_class);

				int
				ti_clknode_clkctrl_register(struct clkdom clkdom, struct ti_clk_clkctrl_def clkdef)
				{
				struct clknode *clk;
				struct ti_clkctrl_clknode_sc *sc;

				clk = clknode_create(clkdom, &ti_clkctrl_clknode_class, &clkdef->clkdef);

				if (clk == NULL) {
				return (1);
				}

				sc = clknode_get_softc(clk);
				sc->register_offset = clkdef->register_offset;

				if (clknode_register(clkdom, clk) == NULL) {
				return (2);
				}
				return (0);
				}