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sys/dev/ixl/i40e_prototype.h
Show First 20 Lines • Show All 94 Lines • ▼ Show 20 Lines | |||||
u32 i40e_led_get(struct i40e_hw *hw); | u32 i40e_led_get(struct i40e_hw *hw); | ||||
void i40e_led_set(struct i40e_hw *hw, u32 mode, bool blink); | void i40e_led_set(struct i40e_hw *hw, u32 mode, bool blink); | ||||
enum i40e_status_code i40e_led_set_phy(struct i40e_hw *hw, bool on, | enum i40e_status_code i40e_led_set_phy(struct i40e_hw *hw, bool on, | ||||
u16 led_addr, u32 mode); | u16 led_addr, u32 mode); | ||||
enum i40e_status_code i40e_led_get_phy(struct i40e_hw *hw, u16 *led_addr, | enum i40e_status_code i40e_led_get_phy(struct i40e_hw *hw, u16 *led_addr, | ||||
u16 *val); | u16 *val); | ||||
enum i40e_status_code i40e_blink_phy_link_led(struct i40e_hw *hw, | enum i40e_status_code i40e_blink_phy_link_led(struct i40e_hw *hw, | ||||
u32 time, u32 interval); | u32 time, u32 interval); | ||||
enum i40e_status_code i40e_led_get_reg(struct i40e_hw *hw, u16 led_addr, | |||||
u32 *reg_val); | |||||
enum i40e_status_code i40e_led_set_reg(struct i40e_hw *hw, u16 led_addr, | |||||
u32 reg_val); | |||||
/* admin send queue commands */ | /* admin send queue commands */ | ||||
enum i40e_status_code i40e_aq_get_firmware_version(struct i40e_hw *hw, | enum i40e_status_code i40e_aq_get_firmware_version(struct i40e_hw *hw, | ||||
u16 *fw_major_version, u16 *fw_minor_version, | u16 *fw_major_version, u16 *fw_minor_version, | ||||
u32 *fw_build, | u32 *fw_build, | ||||
u16 *api_major_version, u16 *api_minor_version, | u16 *api_major_version, u16 *api_minor_version, | ||||
struct i40e_asq_cmd_details *cmd_details); | struct i40e_asq_cmd_details *cmd_details); | ||||
enum i40e_status_code i40e_aq_debug_write_register(struct i40e_hw *hw, | enum i40e_status_code i40e_aq_debug_write_register(struct i40e_hw *hw, | ||||
Show All 16 Lines | enum i40e_status_code i40e_aq_set_phy_config(struct i40e_hw *hw, | ||||
struct i40e_aq_set_phy_config *config, | struct i40e_aq_set_phy_config *config, | ||||
struct i40e_asq_cmd_details *cmd_details); | struct i40e_asq_cmd_details *cmd_details); | ||||
enum i40e_status_code i40e_set_fc(struct i40e_hw *hw, u8 *aq_failures, | enum i40e_status_code i40e_set_fc(struct i40e_hw *hw, u8 *aq_failures, | ||||
bool atomic_reset); | bool atomic_reset); | ||||
enum i40e_status_code i40e_aq_set_phy_int_mask(struct i40e_hw *hw, u16 mask, | enum i40e_status_code i40e_aq_set_phy_int_mask(struct i40e_hw *hw, u16 mask, | ||||
struct i40e_asq_cmd_details *cmd_details); | struct i40e_asq_cmd_details *cmd_details); | ||||
enum i40e_status_code i40e_aq_set_mac_config(struct i40e_hw *hw, | enum i40e_status_code i40e_aq_set_mac_config(struct i40e_hw *hw, | ||||
u16 max_frame_size, bool crc_en, u16 pacing, | u16 max_frame_size, bool crc_en, u16 pacing, | ||||
bool auto_drop_blocking_packets, | |||||
struct i40e_asq_cmd_details *cmd_details); | struct i40e_asq_cmd_details *cmd_details); | ||||
enum i40e_status_code i40e_aq_get_local_advt_reg(struct i40e_hw *hw, | enum i40e_status_code i40e_aq_get_local_advt_reg(struct i40e_hw *hw, | ||||
u64 *advt_reg, | u64 *advt_reg, | ||||
struct i40e_asq_cmd_details *cmd_details); | struct i40e_asq_cmd_details *cmd_details); | ||||
enum i40e_status_code i40e_aq_get_partner_advt(struct i40e_hw *hw, | enum i40e_status_code i40e_aq_get_partner_advt(struct i40e_hw *hw, | ||||
u64 *advt_reg, | u64 *advt_reg, | ||||
struct i40e_asq_cmd_details *cmd_details); | struct i40e_asq_cmd_details *cmd_details); | ||||
enum i40e_status_code | enum i40e_status_code | ||||
▲ Show 20 Lines • Show All 127 Lines • ▼ Show 20 Lines | enum i40e_status_code i40e_aq_get_lldp_mib(struct i40e_hw *hw, u8 bridge_type, | ||||
u16 *local_len, u16 *remote_len, | u16 *local_len, u16 *remote_len, | ||||
struct i40e_asq_cmd_details *cmd_details); | struct i40e_asq_cmd_details *cmd_details); | ||||
enum i40e_status_code i40e_aq_set_lldp_mib(struct i40e_hw *hw, | enum i40e_status_code i40e_aq_set_lldp_mib(struct i40e_hw *hw, | ||||
u8 mib_type, void *buff, u16 buff_size, | u8 mib_type, void *buff, u16 buff_size, | ||||
struct i40e_asq_cmd_details *cmd_details); | struct i40e_asq_cmd_details *cmd_details); | ||||
enum i40e_status_code i40e_aq_cfg_lldp_mib_change_event(struct i40e_hw *hw, | enum i40e_status_code i40e_aq_cfg_lldp_mib_change_event(struct i40e_hw *hw, | ||||
bool enable_update, | bool enable_update, | ||||
struct i40e_asq_cmd_details *cmd_details); | struct i40e_asq_cmd_details *cmd_details); | ||||
enum i40e_status_code i40e_aq_add_lldp_tlv(struct i40e_hw *hw, u8 bridge_type, | enum i40e_status_code | ||||
void *buff, u16 buff_size, u16 tlv_len, | i40e_aq_restore_lldp(struct i40e_hw *hw, u8 *setting, bool restore, | ||||
u16 *mib_len, | |||||
struct i40e_asq_cmd_details *cmd_details); | struct i40e_asq_cmd_details *cmd_details); | ||||
enum i40e_status_code i40e_aq_update_lldp_tlv(struct i40e_hw *hw, | |||||
u8 bridge_type, void *buff, u16 buff_size, | |||||
u16 old_len, u16 new_len, u16 offset, | |||||
u16 *mib_len, | |||||
struct i40e_asq_cmd_details *cmd_details); | |||||
enum i40e_status_code i40e_aq_delete_lldp_tlv(struct i40e_hw *hw, | |||||
u8 bridge_type, void *buff, u16 buff_size, | |||||
u16 tlv_len, u16 *mib_len, | |||||
struct i40e_asq_cmd_details *cmd_details); | |||||
enum i40e_status_code i40e_aq_stop_lldp(struct i40e_hw *hw, bool shutdown_agent, | enum i40e_status_code i40e_aq_stop_lldp(struct i40e_hw *hw, bool shutdown_agent, | ||||
bool persist, | |||||
struct i40e_asq_cmd_details *cmd_details); | struct i40e_asq_cmd_details *cmd_details); | ||||
enum i40e_status_code i40e_aq_set_dcb_parameters(struct i40e_hw *hw, | enum i40e_status_code i40e_aq_set_dcb_parameters(struct i40e_hw *hw, | ||||
bool dcb_enable, | bool dcb_enable, | ||||
struct i40e_asq_cmd_details | struct i40e_asq_cmd_details | ||||
*cmd_details); | *cmd_details); | ||||
enum i40e_status_code i40e_aq_start_lldp(struct i40e_hw *hw, | enum i40e_status_code i40e_aq_start_lldp(struct i40e_hw *hw, | ||||
bool persist, | |||||
struct i40e_asq_cmd_details *cmd_details); | struct i40e_asq_cmd_details *cmd_details); | ||||
enum i40e_status_code i40e_aq_get_cee_dcb_config(struct i40e_hw *hw, | enum i40e_status_code i40e_aq_get_cee_dcb_config(struct i40e_hw *hw, | ||||
void *buff, u16 buff_size, | void *buff, u16 buff_size, | ||||
struct i40e_asq_cmd_details *cmd_details); | struct i40e_asq_cmd_details *cmd_details); | ||||
enum i40e_status_code i40e_aq_start_stop_dcbx(struct i40e_hw *hw, | enum i40e_status_code i40e_aq_start_stop_dcbx(struct i40e_hw *hw, | ||||
bool start_agent, | bool start_agent, | ||||
struct i40e_asq_cmd_details *cmd_details); | struct i40e_asq_cmd_details *cmd_details); | ||||
enum i40e_status_code i40e_aq_add_udp_tunnel(struct i40e_hw *hw, | enum i40e_status_code i40e_aq_add_udp_tunnel(struct i40e_hw *hw, | ||||
▲ Show 20 Lines • Show All 82 Lines • ▼ Show 20 Lines | enum i40e_status_code i40e_aq_query_port_ets_config(struct i40e_hw *hw, | ||||
struct i40e_aqc_query_port_ets_config_resp *bw_data, | struct i40e_aqc_query_port_ets_config_resp *bw_data, | ||||
struct i40e_asq_cmd_details *cmd_details); | struct i40e_asq_cmd_details *cmd_details); | ||||
enum i40e_status_code i40e_aq_query_switch_comp_bw_config(struct i40e_hw *hw, | enum i40e_status_code i40e_aq_query_switch_comp_bw_config(struct i40e_hw *hw, | ||||
u16 seid, | u16 seid, | ||||
struct i40e_aqc_query_switching_comp_bw_config_resp *bw_data, | struct i40e_aqc_query_switching_comp_bw_config_resp *bw_data, | ||||
struct i40e_asq_cmd_details *cmd_details); | struct i40e_asq_cmd_details *cmd_details); | ||||
enum i40e_status_code i40e_aq_resume_port_tx(struct i40e_hw *hw, | enum i40e_status_code i40e_aq_resume_port_tx(struct i40e_hw *hw, | ||||
struct i40e_asq_cmd_details *cmd_details); | struct i40e_asq_cmd_details *cmd_details); | ||||
enum i40e_status_code i40e_read_lldp_cfg(struct i40e_hw *hw, | enum i40e_status_code | ||||
struct i40e_lldp_variables *lldp_cfg); | i40e_aq_add_cloud_filters_bb(struct i40e_hw *hw, u16 seid, | ||||
enum i40e_status_code i40e_aq_add_cloud_filters(struct i40e_hw *hw, | struct i40e_aqc_cloud_filters_element_bb *filters, | ||||
u16 vsi, | |||||
struct i40e_aqc_add_remove_cloud_filters_element_data *filters, | |||||
u8 filter_count); | u8 filter_count); | ||||
enum i40e_status_code | |||||
enum i40e_status_code i40e_aq_remove_cloud_filters(struct i40e_hw *hw, | i40e_aq_add_cloud_filters(struct i40e_hw *hw, u16 vsi, | ||||
u16 vsi, | struct i40e_aqc_cloud_filters_element_data *filters, | ||||
struct i40e_aqc_add_remove_cloud_filters_element_data *filters, | |||||
u8 filter_count); | u8 filter_count); | ||||
enum i40e_status_code | |||||
i40e_aq_rem_cloud_filters(struct i40e_hw *hw, u16 vsi, | |||||
struct i40e_aqc_cloud_filters_element_data *filters, | |||||
u8 filter_count); | |||||
enum i40e_status_code | |||||
i40e_aq_rem_cloud_filters_bb(struct i40e_hw *hw, u16 seid, | |||||
struct i40e_aqc_cloud_filters_element_bb *filters, | |||||
u8 filter_count); | |||||
enum i40e_status_code i40e_read_lldp_cfg(struct i40e_hw *hw, | |||||
struct i40e_lldp_variables *lldp_cfg); | |||||
enum i40e_status_code i40e_aq_replace_cloud_filters(struct i40e_hw *hw, | |||||
struct i40e_aqc_replace_cloud_filters_cmd *filters, | |||||
struct i40e_aqc_replace_cloud_filters_cmd_buf *cmd_buf); | |||||
enum i40e_status_code i40e_aq_alternate_read(struct i40e_hw *hw, | enum i40e_status_code i40e_aq_alternate_read(struct i40e_hw *hw, | ||||
u32 reg_addr0, u32 *reg_val0, | u32 reg_addr0, u32 *reg_val0, | ||||
u32 reg_addr1, u32 *reg_val1); | u32 reg_addr1, u32 *reg_val1); | ||||
enum i40e_status_code i40e_aq_alternate_read_indirect(struct i40e_hw *hw, | enum i40e_status_code i40e_aq_alternate_read_indirect(struct i40e_hw *hw, | ||||
u32 addr, u32 dw_count, void *buffer); | u32 addr, u32 dw_count, void *buffer); | ||||
enum i40e_status_code i40e_aq_alternate_write(struct i40e_hw *hw, | enum i40e_status_code i40e_aq_alternate_write(struct i40e_hw *hw, | ||||
u32 reg_addr0, u32 reg_val0, | u32 reg_addr0, u32 reg_val0, | ||||
u32 reg_addr1, u32 reg_val1); | u32 reg_addr1, u32 reg_val1); | ||||
Show All 25 Lines | |||||
enum i40e_aq_link_speed i40e_get_link_speed(struct i40e_hw *hw); | enum i40e_aq_link_speed i40e_get_link_speed(struct i40e_hw *hw); | ||||
/* prototype for functions used for NVM access */ | /* prototype for functions used for NVM access */ | ||||
enum i40e_status_code i40e_init_nvm(struct i40e_hw *hw); | enum i40e_status_code i40e_init_nvm(struct i40e_hw *hw); | ||||
enum i40e_status_code i40e_acquire_nvm(struct i40e_hw *hw, | enum i40e_status_code i40e_acquire_nvm(struct i40e_hw *hw, | ||||
enum i40e_aq_resource_access_type access); | enum i40e_aq_resource_access_type access); | ||||
void i40e_release_nvm(struct i40e_hw *hw); | void i40e_release_nvm(struct i40e_hw *hw); | ||||
enum i40e_status_code i40e_read_nvm_word(struct i40e_hw *hw, u16 offset, | enum i40e_status_code i40e_read_nvm_word(struct i40e_hw *hw, u16 offset, | ||||
u16 *data); | u16 *data); | ||||
enum i40e_status_code | |||||
i40e_read_nvm_module_data(struct i40e_hw *hw, u8 module_ptr, u16 module_offset, | |||||
u16 data_offset, u16 words_data_size, u16 *data_ptr); | |||||
enum i40e_status_code i40e_read_nvm_buffer(struct i40e_hw *hw, u16 offset, | enum i40e_status_code i40e_read_nvm_buffer(struct i40e_hw *hw, u16 offset, | ||||
u16 *words, u16 *data); | u16 *words, u16 *data); | ||||
enum i40e_status_code i40e_write_nvm_aq(struct i40e_hw *hw, u8 module, | enum i40e_status_code i40e_write_nvm_aq(struct i40e_hw *hw, u8 module, | ||||
u32 offset, u16 words, void *data, | u32 offset, u16 words, void *data, | ||||
bool last_command); | bool last_command); | ||||
enum i40e_status_code __i40e_read_nvm_word(struct i40e_hw *hw, u16 offset, | enum i40e_status_code __i40e_read_nvm_word(struct i40e_hw *hw, u16 offset, | ||||
u16 *data); | u16 *data); | ||||
enum i40e_status_code __i40e_read_nvm_buffer(struct i40e_hw *hw, u16 offset, | enum i40e_status_code __i40e_read_nvm_buffer(struct i40e_hw *hw, u16 offset, | ||||
▲ Show 20 Lines • Show All 86 Lines • ▼ Show 20 Lines | |||||
enum i40e_status_code i40e_aq_rx_ctl_read_register(struct i40e_hw *hw, | enum i40e_status_code i40e_aq_rx_ctl_read_register(struct i40e_hw *hw, | ||||
u32 reg_addr, u32 *reg_val, | u32 reg_addr, u32 *reg_val, | ||||
struct i40e_asq_cmd_details *cmd_details); | struct i40e_asq_cmd_details *cmd_details); | ||||
u32 i40e_read_rx_ctl(struct i40e_hw *hw, u32 reg_addr); | u32 i40e_read_rx_ctl(struct i40e_hw *hw, u32 reg_addr); | ||||
enum i40e_status_code i40e_aq_rx_ctl_write_register(struct i40e_hw *hw, | enum i40e_status_code i40e_aq_rx_ctl_write_register(struct i40e_hw *hw, | ||||
u32 reg_addr, u32 reg_val, | u32 reg_addr, u32 reg_val, | ||||
struct i40e_asq_cmd_details *cmd_details); | struct i40e_asq_cmd_details *cmd_details); | ||||
void i40e_write_rx_ctl(struct i40e_hw *hw, u32 reg_addr, u32 reg_val); | void i40e_write_rx_ctl(struct i40e_hw *hw, u32 reg_addr, u32 reg_val); | ||||
enum i40e_status_code i40e_aq_set_phy_register(struct i40e_hw *hw, | enum i40e_status_code | ||||
u8 phy_select, u8 dev_addr, | i40e_aq_set_phy_register_ext(struct i40e_hw *hw, | ||||
u8 phy_select, u8 dev_addr, bool page_change, | |||||
bool set_mdio, u8 mdio_num, | |||||
u32 reg_addr, u32 reg_val, | u32 reg_addr, u32 reg_val, | ||||
struct i40e_asq_cmd_details *cmd_details); | struct i40e_asq_cmd_details *cmd_details); | ||||
enum i40e_status_code i40e_aq_get_phy_register(struct i40e_hw *hw, | enum i40e_status_code | ||||
u8 phy_select, u8 dev_addr, | i40e_aq_get_phy_register_ext(struct i40e_hw *hw, | ||||
u8 phy_select, u8 dev_addr, bool page_change, | |||||
bool set_mdio, u8 mdio_num, | |||||
u32 reg_addr, u32 *reg_val, | u32 reg_addr, u32 *reg_val, | ||||
struct i40e_asq_cmd_details *cmd_details); | struct i40e_asq_cmd_details *cmd_details); | ||||
/* Convenience wrappers for most common use case */ | |||||
#define i40e_aq_set_phy_register(hw, ps, da, pc, ra, rv, cd) \ | |||||
i40e_aq_set_phy_register_ext(hw, ps, da, pc, FALSE, 0, ra, rv, cd) | |||||
#define i40e_aq_get_phy_register(hw, ps, da, pc, ra, rv, cd) \ | |||||
i40e_aq_get_phy_register_ext(hw, ps, da, pc, FALSE, 0, ra, rv, cd) | |||||
enum i40e_status_code i40e_aq_set_arp_proxy_config(struct i40e_hw *hw, | enum i40e_status_code i40e_aq_set_arp_proxy_config(struct i40e_hw *hw, | ||||
struct i40e_aqc_arp_proxy_data *proxy_config, | struct i40e_aqc_arp_proxy_data *proxy_config, | ||||
struct i40e_asq_cmd_details *cmd_details); | struct i40e_asq_cmd_details *cmd_details); | ||||
enum i40e_status_code i40e_aq_set_ns_proxy_table_entry(struct i40e_hw *hw, | enum i40e_status_code i40e_aq_set_ns_proxy_table_entry(struct i40e_hw *hw, | ||||
struct i40e_aqc_ns_proxy_data *ns_proxy_table_entry, | struct i40e_aqc_ns_proxy_data *ns_proxy_table_entry, | ||||
struct i40e_asq_cmd_details *cmd_details); | struct i40e_asq_cmd_details *cmd_details); | ||||
enum i40e_status_code i40e_aq_set_clear_wol_filter(struct i40e_hw *hw, | enum i40e_status_code i40e_aq_set_clear_wol_filter(struct i40e_hw *hw, | ||||
u8 filter_index, | u8 filter_index, | ||||
Show All 14 Lines | enum i40e_status_code i40e_read_phy_register_clause45(struct i40e_hw *hw, | ||||
u8 page, u16 reg, u8 phy_addr, u16 *value); | u8 page, u16 reg, u8 phy_addr, u16 *value); | ||||
enum i40e_status_code i40e_write_phy_register_clause45(struct i40e_hw *hw, | enum i40e_status_code i40e_write_phy_register_clause45(struct i40e_hw *hw, | ||||
u8 page, u16 reg, u8 phy_addr, u16 value); | u8 page, u16 reg, u8 phy_addr, u16 value); | ||||
enum i40e_status_code i40e_read_phy_register(struct i40e_hw *hw, | enum i40e_status_code i40e_read_phy_register(struct i40e_hw *hw, | ||||
u8 page, u16 reg, u8 phy_addr, u16 *value); | u8 page, u16 reg, u8 phy_addr, u16 *value); | ||||
enum i40e_status_code i40e_write_phy_register(struct i40e_hw *hw, | enum i40e_status_code i40e_write_phy_register(struct i40e_hw *hw, | ||||
u8 page, u16 reg, u8 phy_addr, u16 value); | u8 page, u16 reg, u8 phy_addr, u16 value); | ||||
u8 i40e_get_phy_address(struct i40e_hw *hw, u8 dev_num); | u8 i40e_get_phy_address(struct i40e_hw *hw, u8 dev_num); | ||||
enum i40e_status_code i40e_blink_phy_link_led(struct i40e_hw *hw, | |||||
u32 time, u32 interval); | |||||
#endif /* _I40E_PROTOTYPE_H_ */ | #endif /* _I40E_PROTOTYPE_H_ */ |