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head/devel/gdb/files/kgdb/i386fbsd-kern.c
| Show First 20 Lines • Show All 205 Lines • ▼ Show 20 Lines | i386fbsd_fetch_tss(void) | ||||
| * In SMP kernels, the TSS is stored as part of the per-CPU | * In SMP kernels, the TSS is stored as part of the per-CPU | ||||
| * data. On older kernels, the CPU0's private page | * data. On older kernels, the CPU0's private page | ||||
| * is stored at an address that isn't mapped in minidumps. | * is stored at an address that isn't mapped in minidumps. | ||||
| * However, the data is mapped at the alternate cpu0prvpage | * However, the data is mapped at the alternate cpu0prvpage | ||||
| * address. Thus, if the TSS is at the invalid address, | * address. Thus, if the TSS is at the invalid address, | ||||
| * change it to be relative to cpu0prvpage instead. | * change it to be relative to cpu0prvpage instead. | ||||
| */ | */ | ||||
| if (trunc_page(tss) == 0xffc00000) { | if (trunc_page(tss) == 0xffc00000) { | ||||
| TRY { | try { | ||||
| cpu0prvpage = parse_and_eval_address("cpu0prvpage"); | cpu0prvpage = parse_and_eval_address("cpu0prvpage"); | ||||
| } CATCH(e, RETURN_MASK_ERROR) { | } catch (const gdb_exception_error &e) { | ||||
| return (0); | return (0); | ||||
| } END_CATCH | } | ||||
| tss = cpu0prvpage + (tss & PAGE_MASK); | tss = cpu0prvpage + (tss & PAGE_MASK); | ||||
| } | } | ||||
| return (tss); | return (tss); | ||||
| } | } | ||||
| static struct trad_frame_cache * | static struct trad_frame_cache * | ||||
| i386fbsd_dblfault_cache (struct frame_info *this_frame, void **this_cache) | i386fbsd_dblfault_cache (struct frame_info *this_frame, void **this_cache) | ||||
| { | { | ||||
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