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head/sys/contrib/ncsw/user/env/xx.c
| Show First 20 Lines • Show All 89 Lines • ▼ Show 20 Lines | |||||
| static struct mtx XX_MallocTrackLock; | static struct mtx XX_MallocTrackLock; | ||||
| MTX_SYSINIT(XX_MallocSmartLockInit, &XX_MallocSmartLock, | MTX_SYSINIT(XX_MallocSmartLockInit, &XX_MallocSmartLock, | ||||
| "NetCommSW MallocSmart Lock", MTX_DEF); | "NetCommSW MallocSmart Lock", MTX_DEF); | ||||
| MTX_SYSINIT(XX_MallocTrackLockInit, &XX_MallocTrackLock, | MTX_SYSINIT(XX_MallocTrackLockInit, &XX_MallocTrackLock, | ||||
| "NetCommSW MallocTrack Lock", MTX_DEF); | "NetCommSW MallocTrack Lock", MTX_DEF); | ||||
| /* Interrupt info */ | /* Interrupt info */ | ||||
| #define XX_INTR_FLAG_PREALLOCATED (1 << 0) | #define XX_INTR_FLAG_PREALLOCATED (1 << 0) | ||||
| #define XX_INTR_FLAG_FMAN_FIX (1 << 1) | |||||
| struct XX_IntrInfo { | struct XX_IntrInfo { | ||||
| driver_intr_t *handler; | driver_intr_t *handler; | ||||
| void *arg; | void *arg; | ||||
| int cpu; | int cpu; | ||||
| int flags; | int flags; | ||||
| void *cookie; | void *cookie; | ||||
| }; | }; | ||||
| ▲ Show 20 Lines • Show All 183 Lines • ▼ Show 20 Lines | XX_IsPortalIntr(uintptr_t irq) | ||||
| for (type = 0; type < 2; type++) | for (type = 0; type < 2; type++) | ||||
| for (cpu = 0; cpu < MAXCPU; cpu++) | for (cpu = 0; cpu < MAXCPU; cpu++) | ||||
| if (irq == XX_PInfo.portal_intr[type][cpu]) | if (irq == XX_PInfo.portal_intr[type][cpu]) | ||||
| return (1); | return (1); | ||||
| return (0); | return (0); | ||||
| } | } | ||||
| void | |||||
| XX_FmanFixIntr(int irq) | |||||
| { | |||||
| XX_IntrInfo[irq].flags |= XX_INTR_FLAG_FMAN_FIX; | |||||
| } | |||||
| static bool | |||||
| XX_FmanNeedsIntrFix(int irq) | |||||
| { | |||||
| if (XX_IntrInfo[irq].flags & XX_INTR_FLAG_FMAN_FIX) | |||||
| return (1); | |||||
| return (0); | |||||
| } | |||||
| static void | static void | ||||
| XX_Dispatch(void *arg) | XX_Dispatch(void *arg) | ||||
| { | { | ||||
| struct XX_IntrInfo *info; | struct XX_IntrInfo *info; | ||||
| info = arg; | info = arg; | ||||
| if (info->handler == NULL) { | if (info->handler == NULL) { | ||||
| ▲ Show 20 Lines • Show All 70 Lines • ▼ Show 20 Lines | XX_SetIntr(uintptr_t irq, t_Isr *f_Isr, t_Handle handle) | ||||
| flags = INTR_TYPE_NET | INTR_MPSAFE; | flags = INTR_TYPE_NET | INTR_MPSAFE; | ||||
| /* BMAN/QMAN Portal interrupts must be exlusive */ | /* BMAN/QMAN Portal interrupts must be exlusive */ | ||||
| if (XX_IsPortalIntr(irq)) | if (XX_IsPortalIntr(irq)) | ||||
| flags |= INTR_EXCL; | flags |= INTR_EXCL; | ||||
| err = bus_setup_intr(dev, r, flags, NULL, f_Isr, handle, | err = bus_setup_intr(dev, r, flags, NULL, f_Isr, handle, | ||||
| &XX_IntrInfo[irq].cookie); | &XX_IntrInfo[irq].cookie); | ||||
| if (err) | |||||
| goto finish; | |||||
| /* | |||||
| * XXX: Bind FMan IRQ to CPU0. Current interrupt subsystem directs each | |||||
| * interrupt to all CPUs. Race between an interrupt assertion and | |||||
| * masking may occur and interrupt handler may be called multiple times | |||||
| * per one interrupt. FMan doesn't support such a situation. Workaround | |||||
| * is to bind FMan interrupt to one CPU0 only. | |||||
| */ | |||||
| #ifdef SMP | |||||
| if (XX_FmanNeedsIntrFix(irq)) | |||||
| err = powerpc_bind_intr(irq, 0); | |||||
| #endif | |||||
| finish: | |||||
| return (err); | return (err); | ||||
| } | } | ||||
| t_Error | t_Error | ||||
| XX_FreeIntr(uintptr_t irq) | XX_FreeIntr(uintptr_t irq) | ||||
| { | { | ||||
| device_t dev; | device_t dev; | ||||
| struct resource *r; | struct resource *r; | ||||
| ▲ Show 20 Lines • Show All 375 Lines • Show Last 20 Lines | |||||