Differential D23623 Diff 68177 sys/powerpc/include/psl.h

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sys/powerpc/include/psl.h

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	* Machine State Register (MSR) - All cores			* Machine State Register (MSR) - All cores
	*/			*/
	#define PSL_VEC 0x02000000UL /* AltiVec/SPE vector unit available */			#define PSL_VEC 0x02000000UL /* AltiVec/SPE vector unit available */
	#define PSL_VSX 0x00800000UL /* Vector-Scalar unit available */			#define PSL_VSX 0x00800000UL /* Vector-Scalar unit available */
	#define PSL_EE 0x00008000UL /* external interrupt enable */			#define PSL_EE 0x00008000UL /* external interrupt enable */
	#define PSL_PR 0x00004000UL /* privilege mode (1 == user) */			#define PSL_PR 0x00004000UL /* privilege mode (1 == user) */
	#define PSL_FP 0x00002000UL /* floating point enable */			#define PSL_FP 0x00002000UL /* floating point enable */
	#define PSL_ME 0x00001000UL /* machine check enable */			#define PSL_ME 0x00001000UL /* machine check enable */
	#define PSL_FE0 0x00000800UL /* floating point interrupt mode 0 */			#define PSL_FE0 0x00000800UL /* floating point interrupt mode 0 */
				jhibbitsUnsubmitted Done Inline Actions This belongs in trap.hh, as EXC_PGM_FPE, or similar name, since it's part of SRR1, not MSR. Actually, I think this really should belong in spr.h, as SRR1_PGM_FPE, and the other EXC_PGM* #defines moved there, too. But that's not how it's done now, so just put it in trap.h. jhibbits: This belongs in trap.hh, as EXC_PGM_FPE, or similar name, since it's part of SRR1, not MSR.
	#define PSL_FE1 0x00000100UL /* floating point interrupt mode 1 */			#define PSL_FE1 0x00000100UL /* floating point interrupt mode 1 */
	#define PSL_PMM 0x00000004UL /* performance monitor mark */			#define PSL_PMM 0x00000004UL /* performance monitor mark */
	#define PSL_RI 0x00000002UL /* recoverable interrupt */			#define PSL_RI 0x00000002UL /* recoverable interrupt */

	/* Machine State Register - Book-E cores */			/* Machine State Register - Book-E cores */
	#ifdef __powerpc64__			#ifdef __powerpc64__
	#define PSL_CM 0x80000000UL /* Computation Mode (64-bit) */			#define PSL_CM 0x80000000UL /* Computation Mode (64-bit) */
	#endif			#endif
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	/*			/*
	* Floating-point exception modes:			* Floating-point exception modes:
	*/			*/
	#define PSL_FE_DIS 0 /* none */			#define PSL_FE_DIS 0 /* none */
	#define PSL_FE_NONREC PSL_FE1 /* imprecise non-recoverable */			#define PSL_FE_NONREC PSL_FE1 /* imprecise non-recoverable */
	#define PSL_FE_REC PSL_FE0 /* imprecise recoverable */			#define PSL_FE_REC PSL_FE0 /* imprecise recoverable */
	#define PSL_FE_PREC (PSL_FE0 \| PSL_FE1) /* precise */			#define PSL_FE_PREC (PSL_FE0 \| PSL_FE1) /* precise */
	#define PSL_FE_DFLT PSL_FE_DIS /* default == none */			#define PSL_FE_DFLT PSL_FE_PREC /* default == precise */
				luporlUnsubmitted Done Inline Actions Do we want to enable FP exceptions by default? luporl: Do we want to enable FP exceptions by default?
				renato.riolino_eldorado.org.brUnsubmitted Done Inline Actions It's still not "enabled". By default none of the exception enabled registers are enable. User must call feenableexcept() if he wants to receive a FP exception. renato.riolino_eldorado.org.br: It's still not "enabled". By default none of the exception enabled registers are enable. User…

	#ifndef LOCORE			#ifndef LOCORE
	extern register_t psl_kernset; /* Default MSR values for kernel */			extern register_t psl_kernset; /* Default MSR values for kernel */
	extern register_t psl_userset; /* Default MSR values for userland */			extern register_t psl_userset; /* Default MSR values for userland */
	#ifdef __powerpc64__			#ifdef __powerpc64__
	extern register_t psl_userset32; /* Default user MSR values for 32-bit */			extern register_t psl_userset32; /* Default user MSR values for 32-bit */
	#endif			#endif
	extern register_t psl_userstatic; /* Bits of SRR1 userland may not set */			extern register_t psl_userstatic; /* Bits of SRR1 userland may not set */
	#endif			#endif

	#endif /* _MACHINE_PSL_H_ */			#endif /* _MACHINE_PSL_H_ */