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sys/dev/sis/if_sis.c
Show First 20 Lines • Show All 1,658 Lines • ▼ Show 20 Lines | sis_poll(struct ifnet *ifp, enum poll_cmd cmd, int count) | ||||
/* | /* | ||||
* On the sis, reading the status register also clears it. | * On the sis, reading the status register also clears it. | ||||
* So before returning to intr mode we must make sure that all | * So before returning to intr mode we must make sure that all | ||||
* possible pending sources of interrupts have been served. | * possible pending sources of interrupts have been served. | ||||
* In practice this means run to completion the *eof routines, | * In practice this means run to completion the *eof routines, | ||||
* and then call the interrupt routine | * and then call the interrupt routine | ||||
*/ | */ | ||||
sc->rxcycles = count; | sc->rxcycles = count; | ||||
rx_npkts = sis_rxeof(sc); | rx_npkts = NET_EPOCH_WRAP_RET(sis_rxeof, (sc)); | ||||
sis_txeof(sc); | sis_txeof(sc); | ||||
if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) | if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) | ||||
sis_startl(ifp); | sis_startl(ifp); | ||||
if (sc->rxcycles > 0 || cmd == POLL_AND_CHECK_STATUS) { | if (sc->rxcycles > 0 || cmd == POLL_AND_CHECK_STATUS) { | ||||
uint32_t status; | uint32_t status; | ||||
/* Reading the ISR register clears all interrupts. */ | /* Reading the ISR register clears all interrupts. */ | ||||
▲ Show 20 Lines • Show All 50 Lines • ▼ Show 20 Lines | if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) | ||||
break; | break; | ||||
if (status & | if (status & | ||||
(SIS_ISR_TX_DESC_OK | SIS_ISR_TX_ERR | | (SIS_ISR_TX_DESC_OK | SIS_ISR_TX_ERR | | ||||
SIS_ISR_TX_OK | SIS_ISR_TX_IDLE) ) | SIS_ISR_TX_OK | SIS_ISR_TX_IDLE) ) | ||||
sis_txeof(sc); | sis_txeof(sc); | ||||
if (status & (SIS_ISR_RX_DESC_OK | SIS_ISR_RX_OK | | if (status & (SIS_ISR_RX_DESC_OK | SIS_ISR_RX_OK | | ||||
SIS_ISR_RX_ERR | SIS_ISR_RX_IDLE)) | SIS_ISR_RX_ERR | SIS_ISR_RX_IDLE)) | ||||
sis_rxeof(sc); | NET_EPOCH_WRAP(sis_rxeof, (sc)); | ||||
if (status & SIS_ISR_RX_OFLOW) | if (status & SIS_ISR_RX_OFLOW) | ||||
if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); | if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); | ||||
if (status & (SIS_ISR_RX_IDLE)) | if (status & (SIS_ISR_RX_IDLE)) | ||||
SIS_SETBIT(sc, SIS_CSR, SIS_CSR_RX_ENABLE); | SIS_SETBIT(sc, SIS_CSR, SIS_CSR_RX_ENABLE); | ||||
if (status & SIS_ISR_SYSERR) { | if (status & SIS_ISR_SYSERR) { | ||||
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