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sys/dev/sis/if_sis.c
Show First 20 Lines • Show All 1,641 Lines • ▼ Show 20 Lines | |||||
} | } | ||||
#ifdef DEVICE_POLLING | #ifdef DEVICE_POLLING | ||||
static poll_handler_t sis_poll; | static poll_handler_t sis_poll; | ||||
static int | static int | ||||
sis_poll(struct ifnet *ifp, enum poll_cmd cmd, int count) | sis_poll(struct ifnet *ifp, enum poll_cmd cmd, int count) | ||||
{ | { | ||||
struct epoch_tracker et; | |||||
struct sis_softc *sc = ifp->if_softc; | struct sis_softc *sc = ifp->if_softc; | ||||
int rx_npkts = 0; | int rx_npkts = 0; | ||||
SIS_LOCK(sc); | SIS_LOCK(sc); | ||||
if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) { | if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) { | ||||
SIS_UNLOCK(sc); | SIS_UNLOCK(sc); | ||||
return (rx_npkts); | return (rx_npkts); | ||||
} | } | ||||
/* | /* | ||||
* On the sis, reading the status register also clears it. | * On the sis, reading the status register also clears it. | ||||
* So before returning to intr mode we must make sure that all | * So before returning to intr mode we must make sure that all | ||||
* possible pending sources of interrupts have been served. | * possible pending sources of interrupts have been served. | ||||
* In practice this means run to completion the *eof routines, | * In practice this means run to completion the *eof routines, | ||||
* and then call the interrupt routine | * and then call the interrupt routine | ||||
*/ | */ | ||||
sc->rxcycles = count; | sc->rxcycles = count; | ||||
NET_EPOCH_ENTER(et); | |||||
rx_npkts = sis_rxeof(sc); | rx_npkts = sis_rxeof(sc); | ||||
NET_EPOCH_EXIT(et); | |||||
sis_txeof(sc); | sis_txeof(sc); | ||||
if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) | if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) | ||||
sis_startl(ifp); | sis_startl(ifp); | ||||
if (sc->rxcycles > 0 || cmd == POLL_AND_CHECK_STATUS) { | if (sc->rxcycles > 0 || cmd == POLL_AND_CHECK_STATUS) { | ||||
uint32_t status; | uint32_t status; | ||||
/* Reading the ISR register clears all interrupts. */ | /* Reading the ISR register clears all interrupts. */ | ||||
Show All 14 Lines | sis_poll(struct ifnet *ifp, enum poll_cmd cmd, int count) | ||||
SIS_UNLOCK(sc); | SIS_UNLOCK(sc); | ||||
return (rx_npkts); | return (rx_npkts); | ||||
} | } | ||||
#endif /* DEVICE_POLLING */ | #endif /* DEVICE_POLLING */ | ||||
static void | static void | ||||
sis_intr(void *arg) | sis_intr(void *arg) | ||||
{ | { | ||||
struct epoch_tracker et; | |||||
struct sis_softc *sc; | struct sis_softc *sc; | ||||
struct ifnet *ifp; | struct ifnet *ifp; | ||||
uint32_t status; | uint32_t status; | ||||
sc = arg; | sc = arg; | ||||
ifp = sc->sis_ifp; | ifp = sc->sis_ifp; | ||||
SIS_LOCK(sc); | SIS_LOCK(sc); | ||||
Show All 19 Lines | for (;(status & SIS_INTRS) != 0;) { | ||||
if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) | if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) | ||||
break; | break; | ||||
if (status & | if (status & | ||||
(SIS_ISR_TX_DESC_OK | SIS_ISR_TX_ERR | | (SIS_ISR_TX_DESC_OK | SIS_ISR_TX_ERR | | ||||
SIS_ISR_TX_OK | SIS_ISR_TX_IDLE) ) | SIS_ISR_TX_OK | SIS_ISR_TX_IDLE) ) | ||||
sis_txeof(sc); | sis_txeof(sc); | ||||
if (status & (SIS_ISR_RX_DESC_OK | SIS_ISR_RX_OK | | if (status & (SIS_ISR_RX_DESC_OK | SIS_ISR_RX_OK | | ||||
SIS_ISR_RX_ERR | SIS_ISR_RX_IDLE)) | SIS_ISR_RX_ERR | SIS_ISR_RX_IDLE)) { | ||||
NET_EPOCH_ENTER(et); | |||||
sis_rxeof(sc); | sis_rxeof(sc); | ||||
NET_EPOCH_EXIT(et); | |||||
} | |||||
if (status & SIS_ISR_RX_OFLOW) | if (status & SIS_ISR_RX_OFLOW) | ||||
if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); | if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); | ||||
if (status & (SIS_ISR_RX_IDLE)) | if (status & (SIS_ISR_RX_IDLE)) | ||||
SIS_SETBIT(sc, SIS_CSR, SIS_CSR_RX_ENABLE); | SIS_SETBIT(sc, SIS_CSR, SIS_CSR_RX_ENABLE); | ||||
if (status & SIS_ISR_SYSERR) { | if (status & SIS_ISR_SYSERR) { | ||||
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