Changeset View
Changeset View
Standalone View
Standalone View
head/sys/x86/cpufreq/hwpstate.c
Show First 20 Lines • Show All 309 Lines • ▼ Show 20 Lines | |||||
static void | static void | ||||
hwpstate_identify(driver_t *driver, device_t parent) | hwpstate_identify(driver_t *driver, device_t parent) | ||||
{ | { | ||||
if (device_find_child(parent, "hwpstate", -1) != NULL) | if (device_find_child(parent, "hwpstate", -1) != NULL) | ||||
return; | return; | ||||
if (cpu_vendor_id != CPU_VENDOR_AMD || CPUID_TO_FAMILY(cpu_id) < 0x10) | if ((cpu_vendor_id != CPU_VENDOR_AMD || CPUID_TO_FAMILY(cpu_id) < 0x10) && | ||||
cpu_vendor_id != CPU_VENDOR_HYGON) | |||||
return; | return; | ||||
/* | /* | ||||
* Check if hardware pstate enable bit is set. | * Check if hardware pstate enable bit is set. | ||||
*/ | */ | ||||
if ((amd_pminfo & AMDPM_HW_PSTATE) == 0) { | if ((amd_pminfo & AMDPM_HW_PSTATE) == 0) { | ||||
HWPSTATE_DEBUG(parent, "hwpstate enable bit is not set.\n"); | HWPSTATE_DEBUG(parent, "hwpstate enable bit is not set.\n"); | ||||
return; | return; | ||||
▲ Show 20 Lines • Show All 114 Lines • ▼ Show 20 Lines | case 0x11: | ||||
break; | break; | ||||
case 0x10: | case 0x10: | ||||
case 0x12: | case 0x12: | ||||
case 0x15: | case 0x15: | ||||
case 0x16: | case 0x16: | ||||
hwpstate_set[i].freq = (100 * (fid + 0x10)) >> did; | hwpstate_set[i].freq = (100 * (fid + 0x10)) >> did; | ||||
break; | break; | ||||
case 0x17: | case 0x17: | ||||
case 0x18: | |||||
did = AMD_17H_CUR_DID(msr); | did = AMD_17H_CUR_DID(msr); | ||||
if (did == 0) { | if (did == 0) { | ||||
HWPSTATE_DEBUG(dev, "unexpected did: 0\n"); | HWPSTATE_DEBUG(dev, "unexpected did: 0\n"); | ||||
did = 1; | did = 1; | ||||
} | } | ||||
fid = AMD_17H_CUR_FID(msr); | fid = AMD_17H_CUR_FID(msr); | ||||
hwpstate_set[i].freq = (200 * fid) / did; | hwpstate_set[i].freq = (200 * fid) / did; | ||||
break; | break; | ||||
default: | default: | ||||
HWPSTATE_DEBUG(dev, "get_info_from_msr: AMD family" | HWPSTATE_DEBUG(dev, "get_info_from_msr: %s family" | ||||
" 0x%02x CPUs are not supported yet\n", family); | " 0x%02x CPUs are not supported yet\n", | ||||
cpu_vendor_id == CPU_VENDOR_HYGON ? "Hygon" : "AMD", | |||||
family); | |||||
return (ENXIO); | return (ENXIO); | ||||
} | } | ||||
hwpstate_set[i].pstate_id = i; | hwpstate_set[i].pstate_id = i; | ||||
/* There was volts calculation, but deleted it. */ | /* There was volts calculation, but deleted it. */ | ||||
hwpstate_set[i].volts = CPUFREQ_VAL_UNKNOWN; | hwpstate_set[i].volts = CPUFREQ_VAL_UNKNOWN; | ||||
hwpstate_set[i].power = CPUFREQ_VAL_UNKNOWN; | hwpstate_set[i].power = CPUFREQ_VAL_UNKNOWN; | ||||
hwpstate_set[i].lat = CPUFREQ_VAL_UNKNOWN; | hwpstate_set[i].lat = CPUFREQ_VAL_UNKNOWN; | ||||
} | } | ||||
▲ Show 20 Lines • Show All 72 Lines • Show Last 20 Lines |