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head/sys/amd64/amd64/initcpu.c
Show First 20 Lines • Show All 165 Lines • ▼ Show 20 Lines | init_amd(void) | ||||
* the tunable is not overwritten. | * the tunable is not overwritten. | ||||
* | * | ||||
* The stepping and/or microcode versions should be checked after | * The stepping and/or microcode versions should be checked after | ||||
* this issue is fixed by AMD so that we don't use this mode if not | * this issue is fixed by AMD so that we don't use this mode if not | ||||
* needed. | * needed. | ||||
*/ | */ | ||||
if (lower_sharedpage_init == 0) { | if (lower_sharedpage_init == 0) { | ||||
lower_sharedpage_init = 1; | lower_sharedpage_init = 1; | ||||
if (CPUID_TO_FAMILY(cpu_id) == 0x17) { | if (CPUID_TO_FAMILY(cpu_id) == 0x17 || | ||||
CPUID_TO_FAMILY(cpu_id) == 0x18) { | |||||
hw_lower_amd64_sharedpage = 1; | hw_lower_amd64_sharedpage = 1; | ||||
} | } | ||||
} | } | ||||
} | } | ||||
/* | /* | ||||
* Initialize special VIA features | * Initialize special VIA features | ||||
*/ | */ | ||||
▲ Show 20 Lines • Show All 71 Lines • ▼ Show 20 Lines | if (IS_BSP() && (amd_feature & AMDID_NX) != 0) { | ||||
wrmsr(MSR_EFER, msr); | wrmsr(MSR_EFER, msr); | ||||
pg_nx = PG_NX; | pg_nx = PG_NX; | ||||
} | } | ||||
hw_ibrs_recalculate(); | hw_ibrs_recalculate(); | ||||
hw_ssb_recalculate(false); | hw_ssb_recalculate(false); | ||||
amd64_syscall_ret_flush_l1d_recalc(); | amd64_syscall_ret_flush_l1d_recalc(); | ||||
switch (cpu_vendor_id) { | switch (cpu_vendor_id) { | ||||
case CPU_VENDOR_AMD: | case CPU_VENDOR_AMD: | ||||
case CPU_VENDOR_HYGON: | |||||
init_amd(); | init_amd(); | ||||
break; | break; | ||||
case CPU_VENDOR_CENTAUR: | case CPU_VENDOR_CENTAUR: | ||||
init_via(); | init_via(); | ||||
break; | break; | ||||
} | } | ||||
if ((amd_feature & AMDID_RDTSCP) != 0 || | if ((amd_feature & AMDID_RDTSCP) != 0 || | ||||
Show All 36 Lines |