Page MenuHomeFreeBSD
Differential D22942 Diff 66058 sys/amd64/vmm/intel/vmx.c

Changeset View

Standalone View

View Options

sys/amd64/vmm/intel/vmx.c

Context not available.
SYSCTL_INT(_hw_vmm_vmx_cap, OID_AUTO, invpcid, CTLFLAG_RD, &cap_invpcid, SYSCTL_INT(_hw_vmm_vmx_cap, OID_AUTO, invpcid, CTLFLAG_RD, &cap_invpcid,
0, "Guests are allowed to use INVPCID"); 0, "Guests are allowed to use INVPCID");
static int tpr_shadowing;
SYSCTL_INT(_hw_vmm_vmx_cap, OID_AUTO, tpr_shadowing, CTLFLAG_RD,
&tpr_shadowing, 0, "TPR shadowin support");
darkfiberiru_gmail.comUnsubmitted
Not Done
Inline Actions

s/shadowin /shadowing /

Typo

darkfiberiru_gmail.com: s/shadowin /shadowing / Typo
static int virtual_interrupt_delivery; static int virtual_interrupt_delivery;
SYSCTL_INT(_hw_vmm_vmx_cap, OID_AUTO, virtual_interrupt_delivery, CTLFLAG_RD, SYSCTL_INT(_hw_vmm_vmx_cap, OID_AUTO, virtual_interrupt_delivery, CTLFLAG_RD,
&virtual_interrupt_delivery, 0, "APICv virtual interrupt delivery support"); &virtual_interrupt_delivery, 0, "APICv virtual interrupt delivery support");
Context not available.
static int static int
vmx_init(int ipinum) vmx_init(int ipinum)
{ {
int error, use_tpr_shadow; int error;
uint64_t basic, fixed0, fixed1, feature_control; uint64_t basic, fixed0, fixed1, feature_control;
uint32_t tmp, procbased2_vid_bits; uint32_t tmp, procbased2_vid_bits;
Context not available.
MSR_VMX_PROCBASED_CTLS2, PROCBASED2_ENABLE_INVPCID, 0, MSR_VMX_PROCBASED_CTLS2, PROCBASED2_ENABLE_INVPCID, 0,
&tmp) == 0); &tmp) == 0);
/*
* Check support for TPR shadow.
*/
error = vmx_set_ctlreg(MSR_VMX_PROCBASED_CTLS,
MSR_VMX_TRUE_PROCBASED_CTLS, PROCBASED_USE_TPR_SHADOW, 0,
&tmp);
if (error == 0) {
tpr_shadowing = 1;
TUNABLE_INT_FETCH("hw.vmm.vmx.use_tpr_shadowing",
&tpr_shadowing);
}
if (tpr_shadowing) {
procbased_ctls |= PROCBASED_USE_TPR_SHADOW;
procbased_ctls &= ~PROCBASED_CR8_LOAD_EXITING;
procbased_ctls &= ~PROCBASED_CR8_STORE_EXITING;
}
/* /*
* Check support for virtual interrupt delivery. * Check support for virtual interrupt delivery.
*/ */
Context not available.
PROCBASED2_APIC_REGISTER_VIRTUALIZATION | PROCBASED2_APIC_REGISTER_VIRTUALIZATION |
PROCBASED2_VIRTUAL_INTERRUPT_DELIVERY); PROCBASED2_VIRTUAL_INTERRUPT_DELIVERY);
use_tpr_shadow = (vmx_set_ctlreg(MSR_VMX_PROCBASED_CTLS,
MSR_VMX_TRUE_PROCBASED_CTLS, PROCBASED_USE_TPR_SHADOW, 0,
&tmp) == 0);
error = vmx_set_ctlreg(MSR_VMX_PROCBASED_CTLS2, MSR_VMX_PROCBASED_CTLS2, error = vmx_set_ctlreg(MSR_VMX_PROCBASED_CTLS2, MSR_VMX_PROCBASED_CTLS2,
procbased2_vid_bits, 0, &tmp); procbased2_vid_bits, 0, &tmp);
if (error == 0 && use_tpr_shadow) { if (error == 0 && tpr_shadowing) {
virtual_interrupt_delivery = 1; virtual_interrupt_delivery = 1;
TUNABLE_INT_FETCH("hw.vmm.vmx.use_apic_vid", TUNABLE_INT_FETCH("hw.vmm.vmx.use_apic_vid",
&virtual_interrupt_delivery); &virtual_interrupt_delivery);
Context not available.
procbased_ctls2 |= procbased2_vid_bits; procbased_ctls2 |= procbased2_vid_bits;
procbased_ctls2 &= ~PROCBASED2_VIRTUALIZE_X2APIC_MODE; procbased_ctls2 &= ~PROCBASED2_VIRTUALIZE_X2APIC_MODE;
/*
* No need to emulate accesses to %CR8 if virtual
* interrupt delivery is enabled.
*/
procbased_ctls &= ~PROCBASED_CR8_LOAD_EXITING;
procbased_ctls &= ~PROCBASED_CR8_STORE_EXITING;
/* /*
* Check for Posted Interrupts only if Virtual Interrupt * Check for Posted Interrupts only if Virtual Interrupt
* Delivery is enabled. * Delivery is enabled.
Context not available.
vmx->ctx[i].guest_dr6 = DBREG_DR6_RESERVED1; vmx->ctx[i].guest_dr6 = DBREG_DR6_RESERVED1;
error += vmwrite(VMCS_GUEST_DR7, DBREG_DR7_RESERVED1); error += vmwrite(VMCS_GUEST_DR7, DBREG_DR7_RESERVED1);
if (virtual_interrupt_delivery) { if (tpr_shadowing) {
error += vmwrite(VMCS_APIC_ACCESS, APIC_ACCESS_ADDRESS);
error += vmwrite(VMCS_VIRTUAL_APIC, error += vmwrite(VMCS_VIRTUAL_APIC,
vtophys(&vmx->apic_page[i])); vtophys(&vmx->apic_page[i]));
}
if (virtual_interrupt_delivery) {
error += vmwrite(VMCS_APIC_ACCESS, APIC_ACCESS_ADDRESS);
error += vmwrite(VMCS_EOI_EXIT0, 0); error += vmwrite(VMCS_EOI_EXIT0, 0);
error += vmwrite(VMCS_EOI_EXIT1, 0); error += vmwrite(VMCS_EOI_EXIT1, 0);
error += vmwrite(VMCS_EOI_EXIT2, 0); error += vmwrite(VMCS_EOI_EXIT2, 0);
Context not available.
} }
} }
/*
* If 'TPR shadowing' is used, update the local APICs PPR.
*/
if (tpr_shadowing) {
vlapic = vm_lapic(vmx->vm, vcpu);
vlapic_update_ppr(vlapic);
}
switch (reason) { switch (reason) {
case EXIT_REASON_TASK_SWITCH: case EXIT_REASON_TASK_SWITCH:
ts = &vmexit->u.task_switch; ts = &vmexit->u.task_switch;
Context not available.