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head/sys/dev/pci/pci.c
Show First 20 Lines • Show All 269 Lines • ▼ Show 20 Lines | static const struct pci_quirk pci_quirks[] = { | ||||
/* | /* | ||||
* MSI doesn't work with devices behind the AMD 8131 HT-PCIX | * MSI doesn't work with devices behind the AMD 8131 HT-PCIX | ||||
* bridge. | * bridge. | ||||
*/ | */ | ||||
{ 0x74501022, PCI_QUIRK_DISABLE_MSI, 0, 0 }, | { 0x74501022, PCI_QUIRK_DISABLE_MSI, 0, 0 }, | ||||
/* | /* | ||||
* MSI-X allocation doesn't work properly for devices passed through | |||||
* by VMware up to at least ESXi 5.1. | |||||
*/ | |||||
{ 0x079015ad, PCI_QUIRK_DISABLE_MSIX, 0, 0 }, /* PCI/PCI-X */ | |||||
{ 0x07a015ad, PCI_QUIRK_DISABLE_MSIX, 0, 0 }, /* PCIe */ | |||||
/* | |||||
* Some virtualization environments emulate an older chipset | * Some virtualization environments emulate an older chipset | ||||
* but support MSI just fine. QEMU uses the Intel 82440. | * but support MSI just fine. QEMU uses the Intel 82440. | ||||
*/ | */ | ||||
{ 0x12378086, PCI_QUIRK_ENABLE_MSI_VM, 0, 0 }, | { 0x12378086, PCI_QUIRK_ENABLE_MSI_VM, 0, 0 }, | ||||
/* | /* | ||||
* HPET MMIO base address may appear in Bar1 for AMD SB600 SMBus | * HPET MMIO base address may appear in Bar1 for AMD SB600 SMBus | ||||
* controller depending on SoftPciRst register (PM_IO 0x55 [7]). | * controller depending on SoftPciRst register (PM_IO 0x55 [7]). | ||||
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