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head/sys/dev/ow/owc_gpiobus.c
Show All 32 Lines | |||||
#include <sys/bus.h> | #include <sys/bus.h> | ||||
#include <sys/gpio.h> | #include <sys/gpio.h> | ||||
#include <sys/kernel.h> | #include <sys/kernel.h> | ||||
#include <sys/lock.h> | #include <sys/lock.h> | ||||
#include <sys/malloc.h> | #include <sys/malloc.h> | ||||
#include <sys/module.h> | #include <sys/module.h> | ||||
#include <sys/mutex.h> | #include <sys/mutex.h> | ||||
#include <dev/gpio/gpiobusvar.h> | |||||
#include <dev/ow/owll.h> | |||||
#ifdef FDT | #ifdef FDT | ||||
#include <dev/fdt/fdt_common.h> | |||||
#include <dev/ofw/ofw_bus.h> | #include <dev/ofw/ofw_bus.h> | ||||
#include <dev/ofw/ofw_bus_subr.h> | #include <dev/ofw/ofw_bus_subr.h> | ||||
#endif | |||||
#include <dev/gpio/gpiobusvar.h> | static struct ofw_compat_data compat_data[] = { | ||||
#include "gpiobus_if.h" | {"w1-gpio", true}, | ||||
{NULL, false} | |||||
}; | |||||
OFWBUS_PNP_INFO(compat_data); | |||||
SIMPLEBUS_PNP_INFO(compat_data); | |||||
#endif /* FDT */ | |||||
#include <dev/ow/owll.h> | |||||
#define OW_PIN 0 | #define OW_PIN 0 | ||||
#define OWC_GPIOBUS_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) | #define OWC_GPIOBUS_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) | ||||
#define OWC_GPIOBUS_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) | #define OWC_GPIOBUS_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) | ||||
#define OWC_GPIOBUS_LOCK_INIT(_sc) \ | #define OWC_GPIOBUS_LOCK_INIT(_sc) \ | ||||
mtx_init(&_sc->sc_mtx, device_get_nameunit(_sc->sc_dev), \ | mtx_init(&_sc->sc_mtx, device_get_nameunit(_sc->sc_dev), \ | ||||
"owc_gpiobus", MTX_DEF) | "owc_gpiobus", MTX_DEF) | ||||
#define OWC_GPIOBUS_LOCK_DESTROY(_sc) mtx_destroy(&_sc->sc_mtx); | #define OWC_GPIOBUS_LOCK_DESTROY(_sc) mtx_destroy(&_sc->sc_mtx); | ||||
struct owc_gpiobus_softc | struct owc_gpiobus_softc | ||||
{ | { | ||||
device_t sc_dev; | device_t sc_dev; | ||||
device_t sc_busdev; | gpio_pin_t sc_pin; | ||||
struct mtx sc_mtx; | struct mtx sc_mtx; | ||||
}; | }; | ||||
static int owc_gpiobus_probe(device_t); | static int owc_gpiobus_probe(device_t); | ||||
static int owc_gpiobus_attach(device_t); | static int owc_gpiobus_attach(device_t); | ||||
static int owc_gpiobus_detach(device_t); | static int owc_gpiobus_detach(device_t); | ||||
#ifdef FDT | static int | ||||
static void | owc_gpiobus_probe(device_t dev) | ||||
owc_gpiobus_identify(driver_t *driver, device_t bus) | |||||
{ | { | ||||
phandle_t w1, root; | int rv; | ||||
/* | /* | ||||
* Find all the 1-wire bus pseudo-nodes that are | * By default we only bid to attach if specifically added by our parent | ||||
* at the top level of the FDT. Would be nice to | * (usually via hint.owc_gpiobus.#.at=busname). On FDT systems we bid | ||||
* somehow preserve the node name of these busses, | * as the default driver based on being configured in the FDT data. | ||||
* but there's no good place to put it. The driver's | |||||
* name is used for the device name, and the 1-wire | |||||
* bus overwrites the description. | |||||
*/ | */ | ||||
root = OF_finddevice("/"); | rv = BUS_PROBE_NOWILDCARD; | ||||
if (root == -1) | |||||
return; | |||||
for (w1 = OF_child(root); w1 != 0; w1 = OF_peer(w1)) { | |||||
if (!fdt_is_compatible_strict(w1, "w1-gpio")) | |||||
continue; | |||||
if (!OF_hasprop(w1, "gpios")) | |||||
continue; | |||||
ofw_gpiobus_add_fdt_child(bus, driver->name, w1); | |||||
} | |||||
} | |||||
#endif | |||||
static int | |||||
owc_gpiobus_probe(device_t dev) | |||||
{ | |||||
#ifdef FDT | #ifdef FDT | ||||
if (!ofw_bus_status_okay(dev)) | if (ofw_bus_status_okay(dev) && | ||||
return (ENXIO); | ofw_bus_search_compatible(dev, compat_data)->ocd_data) | ||||
rv = BUS_PROBE_DEFAULT; | |||||
#endif | |||||
if (ofw_bus_is_compatible(dev, "w1-gpio")) { | device_set_desc(dev, "GPIO one-wire bus"); | ||||
device_set_desc(dev, "FDT GPIO attached one-wire bus"); | |||||
return (BUS_PROBE_DEFAULT); | |||||
} | |||||
return (ENXIO); | return (rv); | ||||
#else | |||||
device_set_desc(dev, "GPIO attached one-wire bus"); | |||||
return 0; | |||||
#endif | |||||
} | } | ||||
static int | static int | ||||
owc_gpiobus_attach(device_t dev) | owc_gpiobus_attach(device_t dev) | ||||
{ | { | ||||
struct owc_gpiobus_softc *sc; | struct owc_gpiobus_softc *sc; | ||||
device_t *kids; | int err; | ||||
int nkid; | |||||
sc = device_get_softc(dev); | sc = device_get_softc(dev); | ||||
sc->sc_dev = dev; | sc->sc_dev = dev; | ||||
sc->sc_busdev = device_get_parent(dev); | |||||
#ifdef FDT | |||||
/* Try to configure our pin from fdt data on fdt-based systems. */ | |||||
err = gpio_pin_get_by_ofw_idx(dev, ofw_bus_get_node(dev), OW_PIN, | |||||
&sc->sc_pin); | |||||
#else | |||||
err = ENOENT; | |||||
#endif | |||||
/* | |||||
* If we didn't get configured by fdt data and our parent is gpiobus, | |||||
* see if we can be configured by the bus (allows hinted attachment even | |||||
* on fdt-based systems). | |||||
*/ | |||||
if (err != 0 && | |||||
strcmp("gpiobus", device_get_name(device_get_parent(dev))) == 0) | |||||
err = gpio_pin_get_by_child_index(dev, OW_PIN, &sc->sc_pin); | |||||
/* If we didn't get configured by either method, whine and punt. */ | |||||
if (err != 0) { | |||||
device_printf(sc->sc_dev, | |||||
"cannot acquire gpio pin (config error)\n"); | |||||
return (err); | |||||
} | |||||
OWC_GPIOBUS_LOCK_INIT(sc); | OWC_GPIOBUS_LOCK_INIT(sc); | ||||
nkid = 0; | |||||
if (device_get_children(dev, &kids, &nkid) == 0) | /* | ||||
free(kids, M_TEMP); | * Add the ow bus as a child, but defer probing and attaching it until | ||||
if (nkid == 0) | * interrupts work, because we can't do IO for them until we can read | ||||
device_add_child(dev, "ow", -1); | * the system timecounter (which initializes after device attachments). | ||||
*/ | |||||
device_add_child(sc->sc_dev, "ow", -1); | |||||
return (bus_delayed_attach_children(dev)); | return (bus_delayed_attach_children(dev)); | ||||
} | } | ||||
static int | static int | ||||
owc_gpiobus_detach(device_t dev) | owc_gpiobus_detach(device_t dev) | ||||
{ | { | ||||
struct owc_gpiobus_softc *sc; | struct owc_gpiobus_softc *sc; | ||||
int err; | |||||
sc = device_get_softc(dev); | sc = device_get_softc(dev); | ||||
if ((err = device_delete_children(dev)) != 0) | |||||
return (err); | |||||
gpio_pin_release(sc->sc_pin); | |||||
OWC_GPIOBUS_LOCK_DESTROY(sc); | OWC_GPIOBUS_LOCK_DESTROY(sc); | ||||
bus_generic_detach(dev); | |||||
return (0); | return (0); | ||||
} | } | ||||
/* | /* | ||||
* In the diagrams below, R is driven by the resistor pullup, M is driven by the | * In the diagrams below, R is driven by the resistor pullup, M is driven by the | ||||
* master, and S is driven by the slave / target. | * master, and S is driven by the slave / target. | ||||
*/ | */ | ||||
/* | /* | ||||
* These macros let what why we're doing stuff shine in the code | * These macros let what why we're doing stuff shine in the code | ||||
* below, and let the how be confined to here. | * below, and let the how be confined to here. | ||||
*/ | */ | ||||
#define GETBUS(sc) GPIOBUS_ACQUIRE_BUS((sc)->sc_busdev, \ | #define OUTPIN(sc) gpio_pin_setflags((sc)->sc_pin, GPIO_PIN_OUTPUT) | ||||
(sc)->sc_dev, GPIOBUS_WAIT) | #define INPIN(sc) gpio_pin_setflags((sc)->sc_pin, GPIO_PIN_INPUT) | ||||
#define RELBUS(sc) GPIOBUS_RELEASE_BUS((sc)->sc_busdev, \ | #define GETPIN(sc, bp) gpio_pin_is_active((sc)->sc_pin, (bp)) | ||||
(sc)->sc_dev) | #define LOW(sc) gpio_pin_set_active((sc)->sc_pin, false) | ||||
#define OUTPIN(sc) GPIOBUS_PIN_SETFLAGS((sc)->sc_busdev, \ | |||||
(sc)->sc_dev, OW_PIN, GPIO_PIN_OUTPUT) | |||||
#define INPIN(sc) GPIOBUS_PIN_SETFLAGS((sc)->sc_busdev, \ | |||||
(sc)->sc_dev, OW_PIN, GPIO_PIN_INPUT) | |||||
#define GETPIN(sc, bit) GPIOBUS_PIN_GET((sc)->sc_busdev, \ | |||||
(sc)->sc_dev, OW_PIN, bit) | |||||
#define LOW(sc) GPIOBUS_PIN_SET((sc)->sc_busdev, \ | |||||
(sc)->sc_dev, OW_PIN, GPIO_PIN_LOW) | |||||
/* | /* | ||||
* WRITE-ONE (see owll_if.m for timings) From Figure 4-1 AN-937 | * WRITE-ONE (see owll_if.m for timings) From Figure 4-1 AN-937 | ||||
* | * | ||||
* |<---------tSLOT---->|<-tREC->| | * |<---------tSLOT---->|<-tREC->| | ||||
* High RRRRM | RRRRRRRRRRRR|RRRRRRRRM | * High RRRRM | RRRRRRRRRRRR|RRRRRRRRM | ||||
* M | R | | | M | * M | R | | | M | ||||
* M| R | | | M | * M| R | | | M | ||||
* Low MMMMMMM | | | MMMMMM... | * Low MMMMMMM | | | MMMMMM... | ||||
* |<-tLOW1->| | | | * |<-tLOW1->| | | | ||||
* |<------15us--->| | | * |<------15us--->| | | ||||
* |<--------60us---->| | * |<--------60us---->| | ||||
*/ | */ | ||||
static int | static int | ||||
owc_gpiobus_write_one(device_t dev, struct ow_timing *t) | owc_gpiobus_write_one(device_t dev, struct ow_timing *t) | ||||
{ | { | ||||
struct owc_gpiobus_softc *sc; | struct owc_gpiobus_softc *sc; | ||||
int error; | |||||
sc = device_get_softc(dev); | sc = device_get_softc(dev); | ||||
error = GETBUS(sc); | |||||
if (error != 0) | |||||
return (error); | |||||
critical_enter(); | critical_enter(); | ||||
/* Force low */ | /* Force low */ | ||||
OUTPIN(sc); | OUTPIN(sc); | ||||
LOW(sc); | LOW(sc); | ||||
DELAY(t->t_low1); | DELAY(t->t_low1); | ||||
/* Allow resistor to float line high */ | /* Allow resistor to float line high */ | ||||
INPIN(sc); | INPIN(sc); | ||||
DELAY(t->t_slot - t->t_low1 + t->t_rec); | DELAY(t->t_slot - t->t_low1 + t->t_rec); | ||||
critical_exit(); | critical_exit(); | ||||
RELBUS(sc); | |||||
return (0); | return (0); | ||||
} | } | ||||
/* | /* | ||||
* WRITE-ZERO (see owll_if.m for timings) From Figure 4-2 AN-937 | * WRITE-ZERO (see owll_if.m for timings) From Figure 4-2 AN-937 | ||||
* | * | ||||
* |<---------tSLOT------>|<-tREC->| | * |<---------tSLOT------>|<-tREC->| | ||||
* High RRRRM | | |RRRRRRRM | * High RRRRM | | |RRRRRRRM | ||||
* M | | R M | * M | | R M | ||||
* M| | | |R M | * M| | | |R M | ||||
* Low MMMMMMMMMMMMMMMMMMMMMR MMMMMM... | * Low MMMMMMMMMMMMMMMMMMMMMR MMMMMM... | ||||
* |<--15us->| | | | * |<--15us->| | | | ||||
* |<------60us--->| | | * |<------60us--->| | | ||||
* |<-------tLOW0------>| | * |<-------tLOW0------>| | ||||
*/ | */ | ||||
static int | static int | ||||
owc_gpiobus_write_zero(device_t dev, struct ow_timing *t) | owc_gpiobus_write_zero(device_t dev, struct ow_timing *t) | ||||
{ | { | ||||
struct owc_gpiobus_softc *sc; | struct owc_gpiobus_softc *sc; | ||||
int error; | |||||
sc = device_get_softc(dev); | sc = device_get_softc(dev); | ||||
error = GETBUS(sc); | |||||
if (error != 0) | |||||
return (error); | |||||
critical_enter(); | critical_enter(); | ||||
/* Force low */ | /* Force low */ | ||||
OUTPIN(sc); | OUTPIN(sc); | ||||
LOW(sc); | LOW(sc); | ||||
DELAY(t->t_low0); | DELAY(t->t_low0); | ||||
/* Allow resistor to float line high */ | /* Allow resistor to float line high */ | ||||
INPIN(sc); | INPIN(sc); | ||||
DELAY(t->t_slot - t->t_low0 + t->t_rec); | DELAY(t->t_slot - t->t_low0 + t->t_rec); | ||||
critical_exit(); | critical_exit(); | ||||
RELBUS(sc); | |||||
return (0); | return (0); | ||||
} | } | ||||
/* | /* | ||||
* READ-DATA (see owll_if.m for timings) From Figure 4-3 AN-937 | * READ-DATA (see owll_if.m for timings) From Figure 4-3 AN-937 | ||||
* | * | ||||
* |<---------tSLOT------>|<-tREC->| | * |<---------tSLOT------>|<-tREC->| | ||||
* High RRRRM | rrrrrrrrrrrrrrrRRRRRRRM | * High RRRRM | rrrrrrrrrrrrrrrRRRRRRRM | ||||
* M | r | R M | * M | r | R M | ||||
* M| r | |R M | * M| r | |R M | ||||
* Low MMMMMMMSSSSSSSSSSSSSSR MMMMMM... | * Low MMMMMMMSSSSSSSSSSSSSSR MMMMMM... | ||||
* |<tLOWR>< sample > | | * |<tLOWR>< sample > | | ||||
* |<------tRDV---->| | | * |<------tRDV---->| | | ||||
* ->| |<-tRELEASE | * ->| |<-tRELEASE | ||||
* | * | ||||
* r -- allowed to pull high via the resitor when slave writes a 1-bit | * r -- allowed to pull high via the resitor when slave writes a 1-bit | ||||
* | * | ||||
*/ | */ | ||||
static int | static int | ||||
owc_gpiobus_read_data(device_t dev, struct ow_timing *t, int *bit) | owc_gpiobus_read_data(device_t dev, struct ow_timing *t, int *bit) | ||||
{ | { | ||||
struct owc_gpiobus_softc *sc; | struct owc_gpiobus_softc *sc; | ||||
int error, sample; | bool sample; | ||||
sbintime_t then, now; | sbintime_t then, now; | ||||
sc = device_get_softc(dev); | sc = device_get_softc(dev); | ||||
error = GETBUS(sc); | |||||
if (error != 0) | |||||
return (error); | |||||
critical_enter(); | critical_enter(); | ||||
/* Force low for t_lowr microseconds */ | /* Force low for t_lowr microseconds */ | ||||
then = sbinuptime(); | then = sbinuptime(); | ||||
OUTPIN(sc); | OUTPIN(sc); | ||||
LOW(sc); | LOW(sc); | ||||
DELAY(t->t_lowr); | DELAY(t->t_lowr); | ||||
/* | /* | ||||
* Slave is supposed to hold the line low for t_rdv microseconds for 0 | * Slave is supposed to hold the line low for t_rdv microseconds for 0 | ||||
* and immediately float it high for a 1. This is measured from the | * and immediately float it high for a 1. This is measured from the | ||||
* master's pushing the line low. | * master's pushing the line low. | ||||
*/ | */ | ||||
INPIN(sc); | INPIN(sc); | ||||
do { | do { | ||||
now = sbinuptime(); | now = sbinuptime(); | ||||
GETPIN(sc, &sample); | GETPIN(sc, &sample); | ||||
} while (now - then < (t->t_rdv + 2) * SBT_1US && sample == 0); | } while (now - then < (t->t_rdv + 2) * SBT_1US && sample == false); | ||||
critical_exit(); | critical_exit(); | ||||
if (now - then < t->t_rdv * SBT_1US) | if (now - then < t->t_rdv * SBT_1US) | ||||
*bit = 1; | *bit = 1; | ||||
else | else | ||||
*bit = 0; | *bit = 0; | ||||
/* Wait out the rest of t_slot */ | /* Wait out the rest of t_slot */ | ||||
do { | do { | ||||
now = sbinuptime(); | now = sbinuptime(); | ||||
} while (now - then < (t->t_slot + t->t_rec) * SBT_1US); | } while (now - then < (t->t_slot + t->t_rec) * SBT_1US); | ||||
RELBUS(sc); | return (0); | ||||
return (error); | |||||
} | } | ||||
/* | /* | ||||
* RESET AND PRESENCE PULSE (see owll_if.m for timings) From Figure 4-4 AN-937 | * RESET AND PRESENCE PULSE (see owll_if.m for timings) From Figure 4-4 AN-937 | ||||
* | * | ||||
* |<---------tRSTH------------>| | * |<---------tRSTH------------>| | ||||
* High RRRM | | RRRRRRRS | RRRR RRM | * High RRRM | | RRRRRRRS | RRRR RRM | ||||
* M | |R| |S | R M | * M | |R| |S | R M | ||||
* M| R | | S |R M | * M| R | | S |R M | ||||
* Low MMMMMMMM MMMMMM| | | SSSSSSSSSS MMMMMM | * Low MMMMMMMM MMMMMM| | | SSSSSSSSSS MMMMMM | ||||
* |<----tRSTL--->| | |<-tPDL---->| | * |<----tRSTL--->| | |<-tPDL---->| | ||||
* | ->| |<-tR | | | * | ->| |<-tR | | | ||||
* |<tPDH>| | * |<tPDH>| | ||||
* | * | ||||
* Note: for Regular Speed operations, tRSTL + tR should be less than 960us to | * Note: for Regular Speed operations, tRSTL + tR should be less than 960us to | ||||
* avoid interferring with other devices on the bus | * avoid interfering with other devices on the bus. | ||||
* | |||||
* Return values in *bit: | |||||
* -1 = Bus wiring error (stuck low). | |||||
* 0 = no presence pulse | |||||
* 1 = presence pulse detected | |||||
*/ | */ | ||||
static int | static int | ||||
owc_gpiobus_reset_and_presence(device_t dev, struct ow_timing *t, int *bit) | owc_gpiobus_reset_and_presence(device_t dev, struct ow_timing *t, int *bit) | ||||
{ | { | ||||
struct owc_gpiobus_softc *sc; | struct owc_gpiobus_softc *sc; | ||||
int error; | bool sample; | ||||
int buf = -1; | |||||
sc = device_get_softc(dev); | sc = device_get_softc(dev); | ||||
error = GETBUS(sc); | |||||
if (error != 0) | |||||
return (error); | |||||
/* | /* | ||||
* Read the current state of the bus. The steady state of an idle bus is | * Read the current state of the bus. The steady state of an idle bus is | ||||
* high. Badly wired buses that are missing the required pull up, or | * high. Badly wired buses that are missing the required pull up, or | ||||
* that have a short circuit to ground cause all kinds of mischief when | * that have a short circuit to ground cause all kinds of mischief when | ||||
* we try to read them later. Return EIO and release the bus if the bus | * we try to read them later. Return EIO if the bus is currently low. | ||||
* is currently low. | |||||
*/ | */ | ||||
INPIN(sc); | INPIN(sc); | ||||
GETPIN(sc, &buf); | GETPIN(sc, &sample); | ||||
if (buf == 0) { | if (sample == false) { | ||||
*bit = -1; | *bit = -1; | ||||
RELBUS(sc); | |||||
return (EIO); | return (EIO); | ||||
} | } | ||||
critical_enter(); | critical_enter(); | ||||
/* Force low */ | /* Force low */ | ||||
OUTPIN(sc); | OUTPIN(sc); | ||||
LOW(sc); | LOW(sc); | ||||
DELAY(t->t_rstl); | DELAY(t->t_rstl); | ||||
/* Allow resistor to float line high and then wait for reset pulse */ | /* Allow resistor to float line high and then wait for reset pulse */ | ||||
INPIN(sc); | INPIN(sc); | ||||
DELAY(t->t_pdh + t->t_pdl / 2); | DELAY(t->t_pdh + t->t_pdl / 2); | ||||
/* Read presence pulse */ | /* Read presence pulse */ | ||||
GETPIN(sc, &buf); | GETPIN(sc, &sample); | ||||
*bit = !!buf; | *bit = sample; | ||||
critical_exit(); | critical_exit(); | ||||
DELAY(t->t_rsth - (t->t_pdh + t->t_pdl / 2)); /* Timing not critical for this one */ | DELAY(t->t_rsth - (t->t_pdh + t->t_pdl / 2)); /* Timing not critical for this one */ | ||||
/* | /* | ||||
* Read the state of the bus after we've waited past the end of the rest | * Read the state of the bus after we've waited past the end of the rest | ||||
* window. It should return to high. If it is low, then we have some | * window. It should return to high. If it is low, then we have some | ||||
* problem and should abort the reset. | * problem and should abort the reset. | ||||
*/ | */ | ||||
GETPIN(sc, &buf); | GETPIN(sc, &sample); | ||||
if (buf == 0) { | if (sample == false) { | ||||
*bit = -1; | *bit = -1; | ||||
RELBUS(sc); | |||||
return (EIO); | return (EIO); | ||||
} | } | ||||
RELBUS(sc); | |||||
return (0); | return (0); | ||||
} | } | ||||
static devclass_t owc_gpiobus_devclass; | static devclass_t owc_gpiobus_devclass; | ||||
static device_method_t owc_gpiobus_methods[] = { | static device_method_t owc_gpiobus_methods[] = { | ||||
/* Device interface */ | /* Device interface */ | ||||
#ifdef FDT | |||||
DEVMETHOD(device_identify, owc_gpiobus_identify), | |||||
#endif | |||||
DEVMETHOD(device_probe, owc_gpiobus_probe), | DEVMETHOD(device_probe, owc_gpiobus_probe), | ||||
DEVMETHOD(device_attach, owc_gpiobus_attach), | DEVMETHOD(device_attach, owc_gpiobus_attach), | ||||
DEVMETHOD(device_detach, owc_gpiobus_detach), | DEVMETHOD(device_detach, owc_gpiobus_detach), | ||||
DEVMETHOD(owll_write_one, owc_gpiobus_write_one), | DEVMETHOD(owll_write_one, owc_gpiobus_write_one), | ||||
DEVMETHOD(owll_write_zero, owc_gpiobus_write_zero), | DEVMETHOD(owll_write_zero, owc_gpiobus_write_zero), | ||||
DEVMETHOD(owll_read_data, owc_gpiobus_read_data), | DEVMETHOD(owll_read_data, owc_gpiobus_read_data), | ||||
DEVMETHOD(owll_reset_and_presence, owc_gpiobus_reset_and_presence), | DEVMETHOD(owll_reset_and_presence, owc_gpiobus_reset_and_presence), | ||||
{ 0, 0 } | { 0, 0 } | ||||
}; | }; | ||||
static driver_t owc_gpiobus_driver = { | static driver_t owc_gpiobus_driver = { | ||||
"owc", | "owc", | ||||
owc_gpiobus_methods, | owc_gpiobus_methods, | ||||
sizeof(struct owc_gpiobus_softc), | sizeof(struct owc_gpiobus_softc), | ||||
}; | }; | ||||
#ifdef FDT | |||||
DRIVER_MODULE(owc_gpiobus, simplebus, owc_gpiobus_driver, owc_gpiobus_devclass, 0, 0); | |||||
#endif | |||||
DRIVER_MODULE(owc_gpiobus, gpiobus, owc_gpiobus_driver, owc_gpiobus_devclass, 0, 0); | DRIVER_MODULE(owc_gpiobus, gpiobus, owc_gpiobus_driver, owc_gpiobus_devclass, 0, 0); | ||||
MODULE_DEPEND(owc_gpiobus, ow, 1, 1, 1); | MODULE_DEPEND(owc_gpiobus, ow, 1, 1, 1); | ||||
MODULE_DEPEND(owc_gpiobus, gpiobus, 1, 1, 1); | MODULE_DEPEND(owc_gpiobus, gpiobus, 1, 1, 1); | ||||
MODULE_VERSION(owc_gpiobus, 1); | MODULE_VERSION(owc_gpiobus, 1); |