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usr.sbin/bhyve/pci_xhci.c
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port->portsc |= XHCI_PS_PLS_SET(UPS_PORT_LS_POLL) | | port->portsc |= XHCI_PS_PLS_SET(UPS_PORT_LS_POLL) | | ||||
XHCI_PS_SPEED_SET(dev->dev_ue->ue_usbspeed); | XHCI_PS_SPEED_SET(dev->dev_ue->ue_usbspeed); | ||||
} else { | } else { | ||||
port->portsc |= XHCI_PS_PLS_SET(UPS_PORT_LS_U0) | | port->portsc |= XHCI_PS_PLS_SET(UPS_PORT_LS_U0) | | ||||
XHCI_PS_PED | /* enabled */ | XHCI_PS_PED | /* enabled */ | ||||
XHCI_PS_SPEED_SET(dev->dev_ue->ue_usbspeed); | XHCI_PS_SPEED_SET(dev->dev_ue->ue_usbspeed); | ||||
} | } | ||||
DPRINTF(("Init port %d 0x%x\n", portn, port->portsc)); | DPRINTF(("Init port %d 0x%x\r\n", portn, port->portsc)); | ||||
} else { | } else { | ||||
port->portsc = XHCI_PS_PLS_SET(UPS_PORT_LS_RX_DET) | XHCI_PS_PP; | port->portsc = XHCI_PS_PLS_SET(UPS_PORT_LS_RX_DET) | XHCI_PS_PP; | ||||
DPRINTF(("Init empty port %d 0x%x\n", portn, port->portsc)); | DPRINTF(("Init empty port %d 0x%x\r\n", portn, port->portsc)); | ||||
} | } | ||||
} | } | ||||
static int | static int | ||||
pci_xhci_dev_intr(struct usb_hci *hci, int epctx) | pci_xhci_dev_intr(struct usb_hci *hci, int epctx) | ||||
{ | { | ||||
struct pci_xhci_dev_emu *dev; | struct pci_xhci_dev_emu *dev; | ||||
struct xhci_dev_ctx *dev_ctx; | struct xhci_dev_ctx *dev_ctx; | ||||
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