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Differential D3162 Diff 8184 sys/dev/e1000/e1000_82541.c

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sys/dev/e1000/e1000_82541.c

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/** /**
* e1000_init_phy_params_82541 - Init PHY func ptrs. * e1000_init_phy_params_82541 - Init PHY func ptrs.
* @hw: pointer to the HW structure * @hw: pointer to the HW structure
**/ **/
static s32 e1000_init_phy_params_82541(struct e1000_hw *hw) static s32 e1000_init_phy_params_82541(struct e1000_hw *hw)
{ {
struct e1000_phy_info *phy = &hw->phy; struct e1000_phy_info *phy = &hw->phy;
s32 ret_val = E1000_SUCCESS; s32 ret_val;
DEBUGFUNC("e1000_init_phy_params_82541"); DEBUGFUNC("e1000_init_phy_params_82541");
phy->addr = 1; phy->addr = 1;
phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT; phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT;
phy->reset_delay_us = 10000; phy->reset_delay_us = 10000;
phy->type = e1000_phy_igp; phy->type = e1000_phy_igp;
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/** /**
* e1000_reset_hw_82541 - Reset hardware * e1000_reset_hw_82541 - Reset hardware
* @hw: pointer to the HW structure * @hw: pointer to the HW structure
* *
* This resets the hardware into a known state. * This resets the hardware into a known state.
**/ **/
static s32 e1000_reset_hw_82541(struct e1000_hw *hw) static s32 e1000_reset_hw_82541(struct e1000_hw *hw)
{ {
u32 ledctl, ctrl, icr, manc; u32 ledctl, ctrl, manc;
DEBUGFUNC("e1000_reset_hw_82541"); DEBUGFUNC("e1000_reset_hw_82541");
DEBUGOUT("Masking off all interrupts\n"); DEBUGOUT("Masking off all interrupts\n");
E1000_WRITE_REG(hw, E1000_IMC, 0xFFFFFFFF); E1000_WRITE_REG(hw, E1000_IMC, 0xFFFFFFFF);
E1000_WRITE_REG(hw, E1000_RCTL, 0); E1000_WRITE_REG(hw, E1000_RCTL, 0);
E1000_WRITE_REG(hw, E1000_TCTL, E1000_TCTL_PSP); E1000_WRITE_REG(hw, E1000_TCTL, E1000_TCTL_PSP);
E1000_WRITE_FLUSH(hw); E1000_WRITE_FLUSH(hw);
/* /*
* Delay to allow any outstanding PCI transactions to complete * Delay to allow any outstanding PCI transactions to complete
* before resetting the device. * before resetting the device.
*/ */
msec_delay(10); msec_delay(10);
ctrl = E1000_READ_REG(hw, E1000_CTRL); ctrl = E1000_READ_REG(hw, E1000_CTRL);
/* Must reset the Phy before resetting the MAC */ /* Must reset the Phy before resetting the MAC */
if ((hw->mac.type == e1000_82541) || (hw->mac.type == e1000_82547)) { if ((hw->mac.type == e1000_82541) || (hw->mac.type == e1000_82547)) {
E1000_WRITE_REG(hw, E1000_CTRL, (ctrl | E1000_CTRL_PHY_RST)); E1000_WRITE_REG(hw, E1000_CTRL, (ctrl | E1000_CTRL_PHY_RST));
E1000_WRITE_FLUSH(hw);
msec_delay(5); msec_delay(5);
} }
DEBUGOUT("Issuing a global reset to 82541/82547 MAC\n"); DEBUGOUT("Issuing a global reset to 82541/82547 MAC\n");
switch (hw->mac.type) { switch (hw->mac.type) {
case e1000_82541: case e1000_82541:
case e1000_82541_rev_2: case e1000_82541_rev_2:
/* /*
Show All 26 Lines if ((hw->mac.type == e1000_82541) || (hw->mac.type == e1000_82547)) {
E1000_WRITE_REG(hw, E1000_LEDCTL, ledctl); E1000_WRITE_REG(hw, E1000_LEDCTL, ledctl);
} }
/* Once again, mask the interrupts */ /* Once again, mask the interrupts */
DEBUGOUT("Masking off all interrupts\n"); DEBUGOUT("Masking off all interrupts\n");
E1000_WRITE_REG(hw, E1000_IMC, 0xFFFFFFFF); E1000_WRITE_REG(hw, E1000_IMC, 0xFFFFFFFF);
/* Clear any pending interrupt events. */ /* Clear any pending interrupt events. */
icr = E1000_READ_REG(hw, E1000_ICR); E1000_READ_REG(hw, E1000_ICR);
return E1000_SUCCESS; return E1000_SUCCESS;
} }
/** /**
* e1000_init_hw_82541 - Initialize hardware * e1000_init_hw_82541 - Initialize hardware
* @hw: pointer to the HW structure * @hw: pointer to the HW structure
* *
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