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sys/dev/e1000/e1000_mac.c
Show First 20 Lines • Show All 365 Lines • ▼ Show 20 Lines | |||||
* | * | ||||
* Setup the receive address registers by setting the base receive address | * Setup the receive address registers by setting the base receive address | ||||
* register to the devices MAC address and clearing all the other receive | * register to the devices MAC address and clearing all the other receive | ||||
* address registers to 0. | * address registers to 0. | ||||
**/ | **/ | ||||
void e1000_init_rx_addrs_generic(struct e1000_hw *hw, u16 rar_count) | void e1000_init_rx_addrs_generic(struct e1000_hw *hw, u16 rar_count) | ||||
{ | { | ||||
u32 i; | u32 i; | ||||
u8 mac_addr[ETH_ADDR_LEN] = {0}; | u8 mac_addr[ETHER_ADDR_LEN] = {0}; | ||||
DEBUGFUNC("e1000_init_rx_addrs_generic"); | DEBUGFUNC("e1000_init_rx_addrs_generic"); | ||||
/* Setup the receive address */ | /* Setup the receive address */ | ||||
DEBUGOUT("Programming MAC Address into RAR[0]\n"); | DEBUGOUT("Programming MAC Address into RAR[0]\n"); | ||||
hw->mac.ops.rar_set(hw, hw->mac.addr, 0); | hw->mac.ops.rar_set(hw, hw->mac.addr, 0); | ||||
Show All 15 Lines | |||||
* This function will return SUCCESS unless it encounters an error while | * This function will return SUCCESS unless it encounters an error while | ||||
* reading the EEPROM. | * reading the EEPROM. | ||||
**/ | **/ | ||||
s32 e1000_check_alt_mac_addr_generic(struct e1000_hw *hw) | s32 e1000_check_alt_mac_addr_generic(struct e1000_hw *hw) | ||||
{ | { | ||||
u32 i; | u32 i; | ||||
s32 ret_val; | s32 ret_val; | ||||
u16 offset, nvm_alt_mac_addr_offset, nvm_data; | u16 offset, nvm_alt_mac_addr_offset, nvm_data; | ||||
u8 alt_mac_addr[ETH_ADDR_LEN]; | u8 alt_mac_addr[ETHER_ADDR_LEN]; | ||||
DEBUGFUNC("e1000_check_alt_mac_addr_generic"); | DEBUGFUNC("e1000_check_alt_mac_addr_generic"); | ||||
ret_val = hw->nvm.ops.read(hw, NVM_COMPAT, 1, &nvm_data); | ret_val = hw->nvm.ops.read(hw, NVM_COMPAT, 1, &nvm_data); | ||||
if (ret_val) | if (ret_val) | ||||
return ret_val; | return ret_val; | ||||
/* not supported on older hardware or 82573 */ | /* not supported on older hardware or 82573 */ | ||||
Show All 20 Lines | s32 e1000_check_alt_mac_addr_generic(struct e1000_hw *hw) | ||||
if (hw->bus.func == E1000_FUNC_1) | if (hw->bus.func == E1000_FUNC_1) | ||||
nvm_alt_mac_addr_offset += E1000_ALT_MAC_ADDRESS_OFFSET_LAN1; | nvm_alt_mac_addr_offset += E1000_ALT_MAC_ADDRESS_OFFSET_LAN1; | ||||
if (hw->bus.func == E1000_FUNC_2) | if (hw->bus.func == E1000_FUNC_2) | ||||
nvm_alt_mac_addr_offset += E1000_ALT_MAC_ADDRESS_OFFSET_LAN2; | nvm_alt_mac_addr_offset += E1000_ALT_MAC_ADDRESS_OFFSET_LAN2; | ||||
if (hw->bus.func == E1000_FUNC_3) | if (hw->bus.func == E1000_FUNC_3) | ||||
nvm_alt_mac_addr_offset += E1000_ALT_MAC_ADDRESS_OFFSET_LAN3; | nvm_alt_mac_addr_offset += E1000_ALT_MAC_ADDRESS_OFFSET_LAN3; | ||||
for (i = 0; i < ETH_ADDR_LEN; i += 2) { | for (i = 0; i < ETHER_ADDR_LEN; i += 2) { | ||||
offset = nvm_alt_mac_addr_offset + (i >> 1); | offset = nvm_alt_mac_addr_offset + (i >> 1); | ||||
ret_val = hw->nvm.ops.read(hw, offset, 1, &nvm_data); | ret_val = hw->nvm.ops.read(hw, offset, 1, &nvm_data); | ||||
if (ret_val) { | if (ret_val) { | ||||
DEBUGOUT("NVM Read Error\n"); | DEBUGOUT("NVM Read Error\n"); | ||||
return ret_val; | return ret_val; | ||||
} | } | ||||
alt_mac_addr[i] = (u8)(nvm_data & 0xFF); | alt_mac_addr[i] = (u8)(nvm_data & 0xFF); | ||||
▲ Show 20 Lines • Show All 147 Lines • ▼ Show 20 Lines | void e1000_update_mc_addr_list_generic(struct e1000_hw *hw, | ||||
/* update mta_shadow from mc_addr_list */ | /* update mta_shadow from mc_addr_list */ | ||||
for (i = 0; (u32) i < mc_addr_count; i++) { | for (i = 0; (u32) i < mc_addr_count; i++) { | ||||
hash_value = e1000_hash_mc_addr_generic(hw, mc_addr_list); | hash_value = e1000_hash_mc_addr_generic(hw, mc_addr_list); | ||||
hash_reg = (hash_value >> 5) & (hw->mac.mta_reg_count - 1); | hash_reg = (hash_value >> 5) & (hw->mac.mta_reg_count - 1); | ||||
hash_bit = hash_value & 0x1F; | hash_bit = hash_value & 0x1F; | ||||
hw->mac.mta_shadow[hash_reg] |= (1 << hash_bit); | hw->mac.mta_shadow[hash_reg] |= (1 << hash_bit); | ||||
mc_addr_list += (ETH_ADDR_LEN); | mc_addr_list += (ETHER_ADDR_LEN); | ||||
} | } | ||||
/* replace the entire MTA table */ | /* replace the entire MTA table */ | ||||
for (i = hw->mac.mta_reg_count - 1; i >= 0; i--) | for (i = hw->mac.mta_reg_count - 1; i >= 0; i--) | ||||
E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, hw->mac.mta_shadow[i]); | E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, hw->mac.mta_shadow[i]); | ||||
E1000_WRITE_FLUSH(hw); | E1000_WRITE_FLUSH(hw); | ||||
} | } | ||||
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