Differential D22016 Diff 63241 sys/dev/ichiic/ig4_var.h

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sys/dev/ichiic/ig4_var.h

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	#ifndef _ICHIIC_IG4_VAR_H_			#ifndef _ICHIIC_IG4_VAR_H_
	#define _ICHIIC_IG4_VAR_H_			#define _ICHIIC_IG4_VAR_H_

	#include "bus_if.h"			#include "bus_if.h"
	#include "device_if.h"			#include "device_if.h"
	#include "pci_if.h"			#include "pci_if.h"
	#include "iicbus_if.h"			#include "iicbus_if.h"

	#define IG4_RBUFSIZE 128			enum ig4_vers { IG4_HASWELL, IG4_ATOM, IG4_SKYLAKE, IG4_APL, IG4_CANNONLAKE };
	#define IG4_RBUFMASK (IG4_RBUFSIZE - 1)			/* Controller has additional registers */
				#define IG4_HAS_ADDREGS(vers) ((vers) == IG4_SKYLAKE \|\| \
				(vers) == IG4_APL \|\| (vers) == IG4_CANNONLAKE)

	enum ig4_op { IG4_IDLE, IG4_READ, IG4_WRITE };			struct ig4_cfg {
	enum ig4_vers { IG4_HASWELL, IG4_ATOM, IG4_SKYLAKE, IG4_APL };			uint32_t version;
				uint32_t bus_speed;
				uint16_t ss_scl_hcnt;
				uint16_t ss_scl_lcnt;
				uint16_t fs_scl_hcnt;
				uint16_t fs_scl_lcnt;
				uint16_t sda_tx_hold;
				int txfifo_depth;
				int rxfifo_depth;
				};

	struct ig4iic_softc {			struct ig4iic_softc {
	device_t dev;			device_t dev;
	struct intr_config_hook enum_hook;
	device_t iicbus;			device_t iicbus;
	struct resource *regs_res;			struct resource *regs_res;
	int regs_rid;			int regs_rid;
	struct resource *intr_res;			struct resource *intr_res;
	int intr_rid;			int intr_rid;
	void *intr_handle;			void *intr_handle;
	int intr_type;			int intr_type;
	enum ig4_vers version;			enum ig4_vers version;
	enum ig4_op op;			struct ig4_cfg cfg;
	int cmd;			int cmd;
	int rnext;			uint32_t intr_mask;
	int rpos;
	char rbuf[IG4_RBUFSIZE];
	int error;			int error;
	uint8_t last_slave;			uint8_t last_slave;
	int platform_attached : 1;			int platform_attached : 1;
	int use_10bit : 1;			int use_10bit : 1;
	int slave_valid : 1;			int slave_valid : 1;
	int read_started : 1;			int poll: 1;
	int write_started : 1;
	int access_intr_mask : 1;

	/*			/*
	* Locking semantics:			* Locking semantics:
	*			*
	* Functions implementing the icbus interface that interact			* Functions implementing the icbus interface that interact
	* with the controller acquire an exclusive lock on call_lock			* with the controller acquire an exclusive lock on call_lock
	* to prevent interleaving of calls to the interface and a lock on			* to prevent interleaving of calls to the interface.
	* io_lock right afterwards, to synchronize controller I/O activity.
	*			*
	* The interrupt handler can only read data while no iicbus call			* io_lock is used as condition variable to synchronize active process
	* is in progress or while io_lock is dropped during mtx_sleep in			* with the interrupt handler. It should not be used for tasks other
	* wait_status and set_controller. It is safe to drop io_lock in those			* than waiting for interrupt and passing parameters to and from
	* places, because the interrupt handler only accesses those registers:			* it's handler.
	*
	* - IG4_REG_I2C_STA (I2C Status)
	* - IG4_REG_DATA_CMD (Data Buffer and Command)
	* - IG4_REG_CLR_INTR (Clear Interrupt)
	*
	* Locking outside of those places is required to make the content
	* of rpos/rnext predictable (e.g. whenever data_read is called and in
	* ig4iic_transfer).
	*/			*/
	struct sx call_lock;			struct sx call_lock;
	struct mtx io_lock;			struct mtx io_lock;
	};			};

	typedef struct ig4iic_softc ig4iic_softc_t;			typedef struct ig4iic_softc ig4iic_softc_t;

				extern devclass_t ig4iic_devclass;

	/* Attach/Detach called from ig4iic_pci_() /			/* Attach/Detach called from ig4iic_pci_() /
	int ig4iic_attach(ig4iic_softc_t *sc);			int ig4iic_attach(ig4iic_softc_t *sc);
	int ig4iic_detach(ig4iic_softc_t *sc);			int ig4iic_detach(ig4iic_softc_t *sc);
				int ig4iic_suspend(ig4iic_softc_t *sc);
				int ig4iic_resume(ig4iic_softc_t *sc);

	/* iicbus methods */			/* iicbus methods */
	extern iicbus_transfer_t ig4iic_transfer;			extern iicbus_transfer_t ig4iic_transfer;
	extern iicbus_reset_t ig4iic_reset;			extern iicbus_reset_t ig4iic_reset;
				extern iicbus_callback_t ig4iic_callback;

	#endif /* _ICHIIC_IG4_VAR_H_ */			#endif /* _ICHIIC_IG4_VAR_H_ */