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head/sys/dev/cxgbe/tom/t4_connect.c
Show First 20 Lines • Show All 96 Lines • ▼ Show 20 Lines | if (inp->inp_flags & INP_DROPPED) { | ||||
send_flowc_wr(toep, NULL); | send_flowc_wr(toep, NULL); | ||||
send_reset(sc, toep, be32toh(cpl->snd_isn)); | send_reset(sc, toep, be32toh(cpl->snd_isn)); | ||||
goto done; | goto done; | ||||
} | } | ||||
make_established(toep, be32toh(cpl->snd_isn) - 1, | make_established(toep, be32toh(cpl->snd_isn) - 1, | ||||
be32toh(cpl->rcv_isn) - 1, cpl->tcp_opt); | be32toh(cpl->rcv_isn) - 1, cpl->tcp_opt); | ||||
if (toep->ulp_mode == ULP_MODE_TLS) | if (ulp_mode(toep) == ULP_MODE_TLS) | ||||
tls_establish(toep); | tls_establish(toep); | ||||
done: | done: | ||||
INP_WUNLOCK(inp); | INP_WUNLOCK(inp); | ||||
CURVNET_RESTORE(); | CURVNET_RESTORE(); | ||||
return (0); | return (0); | ||||
} | } | ||||
▲ Show 20 Lines • Show All 46 Lines • ▼ Show 20 Lines | if (status && act_open_has_tid(status)) | ||||
release_tid(sc, GET_TID(cpl), toep->ctrlq); | release_tid(sc, GET_TID(cpl), toep->ctrlq); | ||||
rc = act_open_rpl_status_to_errno(status); | rc = act_open_rpl_status_to_errno(status); | ||||
act_open_failure_cleanup(sc, atid, rc); | act_open_failure_cleanup(sc, atid, rc); | ||||
return (0); | return (0); | ||||
} | } | ||||
/* | |||||
* Options2 for active open. | |||||
*/ | |||||
static uint32_t | |||||
calc_opt2a(struct socket *so, struct toepcb *toep, | |||||
const struct offload_settings *s) | |||||
{ | |||||
struct tcpcb *tp = so_sototcpcb(so); | |||||
struct port_info *pi = toep->vi->pi; | |||||
struct adapter *sc = pi->adapter; | |||||
uint32_t opt2 = 0; | |||||
/* | |||||
* rx flow control, rx coalesce, congestion control, and tx pace are all | |||||
* explicitly set by the driver. On T5+ the ISS is also set by the | |||||
* driver to the value picked by the kernel. | |||||
*/ | |||||
if (is_t4(sc)) { | |||||
opt2 |= F_RX_FC_VALID | F_RX_COALESCE_VALID; | |||||
opt2 |= F_CONG_CNTRL_VALID | F_PACE_VALID; | |||||
} else { | |||||
opt2 |= F_T5_OPT_2_VALID; /* all 4 valid */ | |||||
opt2 |= F_T5_ISS; /* ISS provided in CPL */ | |||||
} | |||||
if (s->sack > 0 || (s->sack < 0 && (tp->t_flags & TF_SACK_PERMIT))) | |||||
opt2 |= F_SACK_EN; | |||||
if (s->tstamp > 0 || (s->tstamp < 0 && (tp->t_flags & TF_REQ_TSTMP))) | |||||
opt2 |= F_TSTAMPS_EN; | |||||
if (tp->t_flags & TF_REQ_SCALE) | |||||
opt2 |= F_WND_SCALE_EN; | |||||
if (s->ecn > 0 || (s->ecn < 0 && V_tcp_do_ecn == 1)) | |||||
opt2 |= F_CCTRL_ECN; | |||||
/* XXX: F_RX_CHANNEL for multiple rx c-chan support goes here. */ | |||||
opt2 |= V_TX_QUEUE(sc->params.tp.tx_modq[pi->tx_chan]); | |||||
/* These defaults are subject to ULP specific fixups later. */ | |||||
opt2 |= V_RX_FC_DDP(0) | V_RX_FC_DISABLE(0); | |||||
opt2 |= V_PACE(0); | |||||
if (s->cong_algo >= 0) | |||||
opt2 |= V_CONG_CNTRL(s->cong_algo); | |||||
else if (sc->tt.cong_algorithm >= 0) | |||||
opt2 |= V_CONG_CNTRL(sc->tt.cong_algorithm & M_CONG_CNTRL); | |||||
else { | |||||
struct cc_algo *cc = CC_ALGO(tp); | |||||
if (strcasecmp(cc->name, "reno") == 0) | |||||
opt2 |= V_CONG_CNTRL(CONG_ALG_RENO); | |||||
else if (strcasecmp(cc->name, "tahoe") == 0) | |||||
opt2 |= V_CONG_CNTRL(CONG_ALG_TAHOE); | |||||
if (strcasecmp(cc->name, "newreno") == 0) | |||||
opt2 |= V_CONG_CNTRL(CONG_ALG_NEWRENO); | |||||
if (strcasecmp(cc->name, "highspeed") == 0) | |||||
opt2 |= V_CONG_CNTRL(CONG_ALG_HIGHSPEED); | |||||
else { | |||||
/* | |||||
* Use newreno in case the algorithm selected by the | |||||
* host stack is not supported by the hardware. | |||||
*/ | |||||
opt2 |= V_CONG_CNTRL(CONG_ALG_NEWRENO); | |||||
} | |||||
} | |||||
if (s->rx_coalesce > 0 || (s->rx_coalesce < 0 && sc->tt.rx_coalesce)) | |||||
opt2 |= V_RX_COALESCE(M_RX_COALESCE); | |||||
/* Note that ofld_rxq is already set according to s->rxq. */ | |||||
opt2 |= F_RSS_QUEUE_VALID; | |||||
opt2 |= V_RSS_QUEUE(toep->ofld_rxq->iq.abs_id); | |||||
#ifdef USE_DDP_RX_FLOW_CONTROL | |||||
if (toep->ulp_mode == ULP_MODE_TCPDDP) | |||||
opt2 |= F_RX_FC_DDP; | |||||
#endif | |||||
if (toep->ulp_mode == ULP_MODE_TLS) { | |||||
opt2 &= ~V_RX_COALESCE(M_RX_COALESCE); | |||||
opt2 |= F_RX_FC_DISABLE; | |||||
} | |||||
return (htobe32(opt2)); | |||||
} | |||||
void | void | ||||
t4_init_connect_cpl_handlers(void) | t4_init_connect_cpl_handlers(void) | ||||
{ | { | ||||
t4_register_cpl_handler(CPL_ACT_ESTABLISH, do_act_establish); | t4_register_cpl_handler(CPL_ACT_ESTABLISH, do_act_establish); | ||||
t4_register_shared_cpl_handler(CPL_ACT_OPEN_RPL, do_act_open_rpl, | t4_register_shared_cpl_handler(CPL_ACT_OPEN_RPL, do_act_open_rpl, | ||||
CPL_COOKIE_TOM); | CPL_COOKIE_TOM); | ||||
} | } | ||||
▲ Show 20 Lines • Show All 51 Lines • ▼ Show 20 Lines | |||||
t4_connect(struct toedev *tod, struct socket *so, struct rtentry *rt, | t4_connect(struct toedev *tod, struct socket *so, struct rtentry *rt, | ||||
struct sockaddr *nam) | struct sockaddr *nam) | ||||
{ | { | ||||
struct adapter *sc = tod->tod_softc; | struct adapter *sc = tod->tod_softc; | ||||
struct toepcb *toep = NULL; | struct toepcb *toep = NULL; | ||||
struct wrqe *wr = NULL; | struct wrqe *wr = NULL; | ||||
struct ifnet *rt_ifp = rt->rt_ifp; | struct ifnet *rt_ifp = rt->rt_ifp; | ||||
struct vi_info *vi; | struct vi_info *vi; | ||||
int mtu_idx, rscale, qid_atid, rc, isipv6, txqid, rxqid; | int qid_atid, rc, isipv6; | ||||
struct inpcb *inp = sotoinpcb(so); | struct inpcb *inp = sotoinpcb(so); | ||||
struct tcpcb *tp = intotcpcb(inp); | struct tcpcb *tp = intotcpcb(inp); | ||||
int reason; | int reason; | ||||
struct offload_settings settings; | struct offload_settings settings; | ||||
uint16_t vid = 0xfff, pcp = 0; | uint16_t vid = 0xfff, pcp = 0; | ||||
INP_WLOCK_ASSERT(inp); | INP_WLOCK_ASSERT(inp); | ||||
KASSERT(nam->sa_family == AF_INET || nam->sa_family == AF_INET6, | KASSERT(nam->sa_family == AF_INET || nam->sa_family == AF_INET6, | ||||
Show All 14 Lines | t4_connect(struct toedev *tod, struct socket *so, struct rtentry *rt, | ||||
rw_rlock(&sc->policy_lock); | rw_rlock(&sc->policy_lock); | ||||
settings = *lookup_offload_policy(sc, OPEN_TYPE_ACTIVE, NULL, | settings = *lookup_offload_policy(sc, OPEN_TYPE_ACTIVE, NULL, | ||||
EVL_MAKETAG(vid, pcp, 0), inp); | EVL_MAKETAG(vid, pcp, 0), inp); | ||||
rw_runlock(&sc->policy_lock); | rw_runlock(&sc->policy_lock); | ||||
if (!settings.offload) | if (!settings.offload) | ||||
DONT_OFFLOAD_ACTIVE_OPEN(EPERM); | DONT_OFFLOAD_ACTIVE_OPEN(EPERM); | ||||
if (settings.txq >= 0 && settings.txq < vi->nofldtxq) | toep = alloc_toepcb(vi, M_NOWAIT); | ||||
txqid = settings.txq; | |||||
else | |||||
txqid = arc4random() % vi->nofldtxq; | |||||
txqid += vi->first_ofld_txq; | |||||
if (settings.rxq >= 0 && settings.rxq < vi->nofldrxq) | |||||
rxqid = settings.rxq; | |||||
else | |||||
rxqid = arc4random() % vi->nofldrxq; | |||||
rxqid += vi->first_ofld_rxq; | |||||
toep = alloc_toepcb(vi, txqid, rxqid, M_NOWAIT | M_ZERO); | |||||
if (toep == NULL) | if (toep == NULL) | ||||
DONT_OFFLOAD_ACTIVE_OPEN(ENOMEM); | DONT_OFFLOAD_ACTIVE_OPEN(ENOMEM); | ||||
toep->tid = alloc_atid(sc, toep); | toep->tid = alloc_atid(sc, toep); | ||||
if (toep->tid < 0) | if (toep->tid < 0) | ||||
DONT_OFFLOAD_ACTIVE_OPEN(ENOMEM); | DONT_OFFLOAD_ACTIVE_OPEN(ENOMEM); | ||||
toep->l2te = t4_l2t_get(vi->pi, rt_ifp, | toep->l2te = t4_l2t_get(vi->pi, rt_ifp, | ||||
rt->rt_flags & RTF_GATEWAY ? rt->rt_gateway : nam); | rt->rt_flags & RTF_GATEWAY ? rt->rt_gateway : nam); | ||||
if (toep->l2te == NULL) | if (toep->l2te == NULL) | ||||
DONT_OFFLOAD_ACTIVE_OPEN(ENOMEM); | DONT_OFFLOAD_ACTIVE_OPEN(ENOMEM); | ||||
toep->vnet = so->so_vnet; | |||||
init_conn_params(vi, &settings, &inp->inp_inc, so, NULL, | |||||
toep->l2te->idx, &toep->params); | |||||
init_toepcb(vi, toep); | |||||
isipv6 = nam->sa_family == AF_INET6; | isipv6 = nam->sa_family == AF_INET6; | ||||
wr = alloc_wrqe(act_open_cpl_size(sc, isipv6), toep->ctrlq); | wr = alloc_wrqe(act_open_cpl_size(sc, isipv6), toep->ctrlq); | ||||
if (wr == NULL) | if (wr == NULL) | ||||
DONT_OFFLOAD_ACTIVE_OPEN(ENOMEM); | DONT_OFFLOAD_ACTIVE_OPEN(ENOMEM); | ||||
toep->vnet = so->so_vnet; | |||||
set_ulp_mode(toep, select_ulp_mode(so, sc, &settings)); | |||||
SOCKBUF_LOCK(&so->so_rcv); | |||||
toep->opt0_rcv_bufsize = min(select_rcv_wnd(so) >> 10, M_RCV_BUFSIZ); | |||||
SOCKBUF_UNLOCK(&so->so_rcv); | |||||
/* | |||||
* The kernel sets request_r_scale based on sb_max whereas we need to | |||||
* take hardware's MAX_RCV_WND into account too. This is normally a | |||||
* no-op as MAX_RCV_WND is much larger than the default sb_max. | |||||
*/ | |||||
if (tp->t_flags & TF_REQ_SCALE) | |||||
rscale = tp->request_r_scale = select_rcv_wscale(); | |||||
else | |||||
rscale = 0; | |||||
mtu_idx = find_best_mtu_idx(sc, &inp->inp_inc, &settings); | |||||
qid_atid = V_TID_QID(toep->ofld_rxq->iq.abs_id) | V_TID_TID(toep->tid) | | qid_atid = V_TID_QID(toep->ofld_rxq->iq.abs_id) | V_TID_TID(toep->tid) | | ||||
V_TID_COOKIE(CPL_COOKIE_TOM); | V_TID_COOKIE(CPL_COOKIE_TOM); | ||||
if (isipv6) { | if (isipv6) { | ||||
struct cpl_act_open_req6 *cpl = wrtod(wr); | struct cpl_act_open_req6 *cpl = wrtod(wr); | ||||
struct cpl_t5_act_open_req6 *cpl5 = (void *)cpl; | struct cpl_t5_act_open_req6 *cpl5 = (void *)cpl; | ||||
struct cpl_t6_act_open_req6 *cpl6 = (void *)cpl; | struct cpl_t6_act_open_req6 *cpl6 = (void *)cpl; | ||||
Show All 24 Lines | if (isipv6) { | ||||
OPCODE_TID(cpl) = htobe32(MK_OPCODE_TID(CPL_ACT_OPEN_REQ6, | OPCODE_TID(cpl) = htobe32(MK_OPCODE_TID(CPL_ACT_OPEN_REQ6, | ||||
qid_atid)); | qid_atid)); | ||||
cpl->local_port = inp->inp_lport; | cpl->local_port = inp->inp_lport; | ||||
cpl->local_ip_hi = *(uint64_t *)&inp->in6p_laddr.s6_addr[0]; | cpl->local_ip_hi = *(uint64_t *)&inp->in6p_laddr.s6_addr[0]; | ||||
cpl->local_ip_lo = *(uint64_t *)&inp->in6p_laddr.s6_addr[8]; | cpl->local_ip_lo = *(uint64_t *)&inp->in6p_laddr.s6_addr[8]; | ||||
cpl->peer_port = inp->inp_fport; | cpl->peer_port = inp->inp_fport; | ||||
cpl->peer_ip_hi = *(uint64_t *)&inp->in6p_faddr.s6_addr[0]; | cpl->peer_ip_hi = *(uint64_t *)&inp->in6p_faddr.s6_addr[0]; | ||||
cpl->peer_ip_lo = *(uint64_t *)&inp->in6p_faddr.s6_addr[8]; | cpl->peer_ip_lo = *(uint64_t *)&inp->in6p_faddr.s6_addr[8]; | ||||
cpl->opt0 = calc_opt0(so, vi, toep->l2te, mtu_idx, rscale, | cpl->opt0 = calc_options0(vi, &toep->params); | ||||
toep->opt0_rcv_bufsize, toep->ulp_mode, &settings); | cpl->opt2 = calc_options2(vi, &toep->params); | ||||
cpl->opt2 = calc_opt2a(so, toep, &settings); | |||||
CTR6(KTR_CXGBE, | |||||
"%s: atid %u, toep %p, inp %p, opt0 %#016lx, opt2 %#08x", | |||||
__func__, toep->tid, toep, inp, be64toh(cpl->opt0), | |||||
be32toh(cpl->opt2)); | |||||
} else { | } else { | ||||
struct cpl_act_open_req *cpl = wrtod(wr); | struct cpl_act_open_req *cpl = wrtod(wr); | ||||
struct cpl_t5_act_open_req *cpl5 = (void *)cpl; | struct cpl_t5_act_open_req *cpl5 = (void *)cpl; | ||||
struct cpl_t6_act_open_req *cpl6 = (void *)cpl; | struct cpl_t6_act_open_req *cpl6 = (void *)cpl; | ||||
switch (chip_id(sc)) { | switch (chip_id(sc)) { | ||||
case CHELSIO_T4: | case CHELSIO_T4: | ||||
INIT_TP_WR(cpl, 0); | INIT_TP_WR(cpl, 0); | ||||
Show All 10 Lines | default: | ||||
cpl6->iss = htobe32(tp->iss); | cpl6->iss = htobe32(tp->iss); | ||||
cpl6->params = select_ntuple(vi, toep->l2te); | cpl6->params = select_ntuple(vi, toep->l2te); | ||||
break; | break; | ||||
} | } | ||||
OPCODE_TID(cpl) = htobe32(MK_OPCODE_TID(CPL_ACT_OPEN_REQ, | OPCODE_TID(cpl) = htobe32(MK_OPCODE_TID(CPL_ACT_OPEN_REQ, | ||||
qid_atid)); | qid_atid)); | ||||
inp_4tuple_get(inp, &cpl->local_ip, &cpl->local_port, | inp_4tuple_get(inp, &cpl->local_ip, &cpl->local_port, | ||||
&cpl->peer_ip, &cpl->peer_port); | &cpl->peer_ip, &cpl->peer_port); | ||||
cpl->opt0 = calc_opt0(so, vi, toep->l2te, mtu_idx, rscale, | cpl->opt0 = calc_options0(vi, &toep->params); | ||||
toep->opt0_rcv_bufsize, toep->ulp_mode, &settings); | cpl->opt2 = calc_options2(vi, &toep->params); | ||||
cpl->opt2 = calc_opt2a(so, toep, &settings); | |||||
} | |||||
CTR5(KTR_CXGBE, "%s: atid %u (%s), toep %p, inp %p", __func__, | CTR6(KTR_CXGBE, | ||||
toep->tid, tcpstates[tp->t_state], toep, inp); | "%s: atid %u, toep %p, inp %p, opt0 %#016lx, opt2 %#08x", | ||||
__func__, toep->tid, toep, inp, be64toh(cpl->opt0), | |||||
be32toh(cpl->opt2)); | |||||
} | |||||
offload_socket(so, toep); | offload_socket(so, toep); | ||||
rc = t4_l2t_send(sc, wr, toep->l2te); | rc = t4_l2t_send(sc, wr, toep->l2te); | ||||
if (rc == 0) { | if (rc == 0) { | ||||
toep->flags |= TPF_CPL_PENDING; | toep->flags |= TPF_CPL_PENDING; | ||||
return (0); | return (0); | ||||
} | } | ||||
Show All 21 Lines |