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head/usr.sbin/bhyve/pci_nvme.c
Show First 20 Lines • Show All 93 Lines • ▼ Show 20 Lines | |||||
#define NVME_MMIO_SPACE_MIN (1 << 14) | #define NVME_MMIO_SPACE_MIN (1 << 14) | ||||
#define NVME_QUEUES 16 | #define NVME_QUEUES 16 | ||||
#define NVME_MAX_QENTRIES 2048 | #define NVME_MAX_QENTRIES 2048 | ||||
#define NVME_PRP2_ITEMS (PAGE_SIZE/sizeof(uint64_t)) | #define NVME_PRP2_ITEMS (PAGE_SIZE/sizeof(uint64_t)) | ||||
#define NVME_MAX_BLOCKIOVS 512 | #define NVME_MAX_BLOCKIOVS 512 | ||||
/* This is a synthetic status code to indicate there is no status */ | |||||
#define NVME_NO_STATUS 0xffff | |||||
#define NVME_COMPLETION_VALID(c) ((c).status != NVME_NO_STATUS) | |||||
/* helpers */ | /* helpers */ | ||||
/* Convert a zero-based value into a one-based value */ | /* Convert a zero-based value into a one-based value */ | ||||
#define ONE_BASED(zero) ((zero) + 1) | #define ONE_BASED(zero) ((zero) + 1) | ||||
/* Convert a one-based value into a zero-based value */ | /* Convert a one-based value into a zero-based value */ | ||||
#define ZERO_BASED(one) ((one) - 1) | #define ZERO_BASED(one) ((one) - 1) | ||||
/* Encode number of SQ's and CQ's for Set/Get Features */ | /* Encode number of SQ's and CQ's for Set/Get Features */ | ||||
▲ Show 20 Lines • Show All 978 Lines • ▼ Show 20 Lines | case NVME_OPC_GET_FEATURES: | ||||
DPRINTF(("%s command GET_FEATURES\r\n", __func__)); | DPRINTF(("%s command GET_FEATURES\r\n", __func__)); | ||||
do_intr |= nvme_opc_get_features(sc, cmd, &compl); | do_intr |= nvme_opc_get_features(sc, cmd, &compl); | ||||
break; | break; | ||||
case NVME_OPC_ASYNC_EVENT_REQUEST: | case NVME_OPC_ASYNC_EVENT_REQUEST: | ||||
DPRINTF(("%s command ASYNC_EVENT_REQ\r\n", __func__)); | DPRINTF(("%s command ASYNC_EVENT_REQ\r\n", __func__)); | ||||
/* XXX dont care, unhandled for now | /* XXX dont care, unhandled for now | ||||
do_intr |= nvme_opc_async_event_req(sc, cmd, &compl); | do_intr |= nvme_opc_async_event_req(sc, cmd, &compl); | ||||
*/ | */ | ||||
compl.status = NVME_NO_STATUS; | |||||
break; | break; | ||||
default: | default: | ||||
WPRINTF(("0x%x command is not implemented\r\n", | WPRINTF(("0x%x command is not implemented\r\n", | ||||
cmd->opc)); | cmd->opc)); | ||||
pci_nvme_status_genc(&compl.status, NVME_SC_INVALID_OPCODE); | |||||
do_intr |= 1; | |||||
} | } | ||||
/* for now skip async event generation */ | if (NVME_COMPLETION_VALID(compl)) { | ||||
if (cmd->opc != NVME_OPC_ASYNC_EVENT_REQUEST) { | |||||
struct nvme_completion *cp; | struct nvme_completion *cp; | ||||
int phase; | int phase; | ||||
cq = &sc->compl_queues[0]; | cq = &sc->compl_queues[0]; | ||||
cp = &(cq->qbase)[cq->tail]; | cp = &(cq->qbase)[cq->tail]; | ||||
cp->cdw0 = compl.cdw0; | cp->cdw0 = compl.cdw0; | ||||
cp->sqid = 0; | cp->sqid = 0; | ||||
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