Differential D20772 Diff 59707 head/sys/mips/mips/support.S

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head/sys/mips/mips/support.S

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	XLEAF(casueword)			XLEAF(casueword)
	#endif			#endif
	PTR_LA v0, fswberr			PTR_LA v0, fswberr
	blt a0, zero, fswberr # make sure address is in user space			blt a0, zero, fswberr # make sure address is in user space
	nop			nop
	GET_CPU_PCPU(v1)			GET_CPU_PCPU(v1)
	PTR_L v1, PC_CURPCB(v1)			PTR_L v1, PC_CURPCB(v1)
	PTR_S v0, U_PCB_ONFAULT(v1)			PTR_S v0, U_PCB_ONFAULT(v1)
	1:
				li v0, 1
	move t0, a3			move t0, a3
	ll t1, 0(a0)			ll t1, 0(a0)
	bne a1, t1, 2f			bne a1, t1, 1f
	nop			nop
	sc t0, 0(a0) # store word			sc t0, 0(a0) # store word
	beqz t0, 1b			xori v0, t0, 1
	nop			1:
	j 3f
	li v0, 0
	2:
	li v0, -1
	3:
	PTR_S zero, U_PCB_ONFAULT(v1)			PTR_S zero, U_PCB_ONFAULT(v1)
	jr ra			jr ra
	sw t1, 0(a2) # unconditionally store old word			sw t1, 0(a2) # unconditionally store old word
	END(casueword32)			END(casueword32)

	#ifdef __mips_n64			#ifdef __mips_n64
	LEAF(casueword64)			LEAF(casueword64)
	XLEAF(casueword)			XLEAF(casueword)
	PTR_LA v0, fswberr			PTR_LA v0, fswberr
	blt a0, zero, fswberr # make sure address is in user space			blt a0, zero, fswberr # make sure address is in user space
	nop			nop
	GET_CPU_PCPU(v1)			GET_CPU_PCPU(v1)
	PTR_L v1, PC_CURPCB(v1)			PTR_L v1, PC_CURPCB(v1)
	PTR_S v0, U_PCB_ONFAULT(v1)			PTR_S v0, U_PCB_ONFAULT(v1)
	1:
				li v0, 1
	move t0, a3			move t0, a3
	lld t1, 0(a0)			lld t1, 0(a0)
	bne a1, t1, 2f			bne a1, t1, 1f
	nop			nop
	scd t0, 0(a0) # store double word			scd t0, 0(a0) # store double word
	beqz t0, 1b			xori v0, t0, 1
	nop			1:
	j 3f
	li v0, 0
	2:
	li v0, -1
	3:
	PTR_S zero, U_PCB_ONFAULT(v1)			PTR_S zero, U_PCB_ONFAULT(v1)
	jr ra			jr ra
	sd t1, 0(a2) # unconditionally store old word			sd t1, 0(a2) # unconditionally store old word
	END(casueword64)			END(casueword64)
	#endif			#endif

	/*			/*
	* Will have to flush the instruction cache if byte merging is done in hardware.			* Will have to flush the instruction cache if byte merging is done in hardware.
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