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head/sys/dev/pci/pci.c
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{ | { | ||||
struct pci_devinfo *dinfo = device_get_ivars(dev); | struct pci_devinfo *dinfo = device_get_ivars(dev); | ||||
struct pcicfg_msix *msix = &dinfo->cfg.msix; | struct pcicfg_msix *msix = &dinfo->cfg.msix; | ||||
uint32_t offset, val; | uint32_t offset, val; | ||||
KASSERT(msix->msix_msgnum > index, ("bogus index")); | KASSERT(msix->msix_msgnum > index, ("bogus index")); | ||||
offset = msix->msix_table_offset + index * 16 + 12; | offset = msix->msix_table_offset + index * 16 + 12; | ||||
val = bus_read_4(msix->msix_table_res, offset); | val = bus_read_4(msix->msix_table_res, offset); | ||||
if (!(val & PCIM_MSIX_VCTRL_MASK)) { | |||||
val |= PCIM_MSIX_VCTRL_MASK; | val |= PCIM_MSIX_VCTRL_MASK; | ||||
/* | |||||
* Some devices (e.g. Samsung PM961) do not support reads of this | |||||
* register, so always write the new value. | |||||
*/ | |||||
bus_write_4(msix->msix_table_res, offset, val); | bus_write_4(msix->msix_table_res, offset, val); | ||||
} | } | ||||
} | |||||
void | void | ||||
pci_unmask_msix(device_t dev, u_int index) | pci_unmask_msix(device_t dev, u_int index) | ||||
{ | { | ||||
struct pci_devinfo *dinfo = device_get_ivars(dev); | struct pci_devinfo *dinfo = device_get_ivars(dev); | ||||
struct pcicfg_msix *msix = &dinfo->cfg.msix; | struct pcicfg_msix *msix = &dinfo->cfg.msix; | ||||
uint32_t offset, val; | uint32_t offset, val; | ||||
KASSERT(msix->msix_table_len > index, ("bogus index")); | KASSERT(msix->msix_table_len > index, ("bogus index")); | ||||
offset = msix->msix_table_offset + index * 16 + 12; | offset = msix->msix_table_offset + index * 16 + 12; | ||||
val = bus_read_4(msix->msix_table_res, offset); | val = bus_read_4(msix->msix_table_res, offset); | ||||
if (val & PCIM_MSIX_VCTRL_MASK) { | |||||
val &= ~PCIM_MSIX_VCTRL_MASK; | val &= ~PCIM_MSIX_VCTRL_MASK; | ||||
/* | |||||
* Some devices (e.g. Samsung PM961) do not support reads of this | |||||
* register, so always write the new value. | |||||
*/ | |||||
bus_write_4(msix->msix_table_res, offset, val); | bus_write_4(msix->msix_table_res, offset, val); | ||||
} | |||||
} | } | ||||
int | int | ||||
pci_pending_msix(device_t dev, u_int index) | pci_pending_msix(device_t dev, u_int index) | ||||
{ | { | ||||
struct pci_devinfo *dinfo = device_get_ivars(dev); | struct pci_devinfo *dinfo = device_get_ivars(dev); | ||||
struct pcicfg_msix *msix = &dinfo->cfg.msix; | struct pcicfg_msix *msix = &dinfo->cfg.msix; | ||||
uint32_t offset, bit; | uint32_t offset, bit; | ||||
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