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Show First 20 Lines • Show All 666 Lines • ▼ Show 20 Lines	its_init_cpu(device_t dev, struct gicv3_its_softc *sc)
cpuid = PCPU_GET(cpuid);		cpuid = PCPU_GET(cpuid);
if (!CPU_ISSET(cpuid, &sc->sc_cpus))		if (!CPU_ISSET(cpuid, &sc->sc_cpus))
return (0);		return (0);

/* Check if the ITS is enabled on this CPU */		/* Check if the ITS is enabled on this CPU */
if ((gic_r_read_4(gicv3, GICR_TYPER) & GICR_TYPER_PLPIS) == 0)		if ((gic_r_read_4(gicv3, GICR_TYPER) & GICR_TYPER_PLPIS) == 0)
return (ENXIO);		return (ENXIO);

		rpcpu = gicv3_get_redist(dev);

		/* Do per-cpu LPI init once */
		if (!rpcpu->lpi_enabled) {
its_init_cpu_lpi(dev, sc);		its_init_cpu_lpi(dev, sc);
		rpcpu->lpi_enabled = true;
		}

if ((gic_its_read_8(sc, GITS_TYPER) & GITS_TYPER_PTA) != 0) {		if ((gic_its_read_8(sc, GITS_TYPER) & GITS_TYPER_PTA) != 0) {
/* This ITS wants the redistributor physical address */		/* This ITS wants the redistributor physical address */
rpcpu = gicv3_get_redist(dev);
target = vtophys(rman_get_virtual(&rpcpu->res));		target = vtophys(rman_get_virtual(&rpcpu->res));
} else {		} else {
/* This ITS wants the unique processor number */		/* This ITS wants the unique processor number */
target = GICR_TYPER_CPUNUM(gic_r_read_8(gicv3, GICR_TYPER));		target = GICR_TYPER_CPUNUM(gic_r_read_8(gicv3, GICR_TYPER));
}		}

sc->sc_its_cols[cpuid]->col_target = target;		sc->sc_its_cols[cpuid]->col_target = target;
sc->sc_its_cols[cpuid]->col_id = cpuid;		sc->sc_its_cols[cpuid]->col_id = cpuid;
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