Page MenuHomeFreeBSD
Differential D19842 Diff 58060 head/sys/arm64/arm64/gic_v3.c

Changeset View

Standalone View

View Options

head/sys/arm64/arm64/gic_v3.c

Show First 20 Lines • Show All 177 Lines • ▼ Show 20 Linesstatic gic_v3_initseq_t gic_v3_secondary_init[] = {
NULL NULL
}; };
#endif #endif
uint32_t uint32_t
gic_r_read_4(device_t dev, bus_size_t offset) gic_r_read_4(device_t dev, bus_size_t offset)
{ {
struct gic_v3_softc *sc; struct gic_v3_softc *sc;
struct resource *rdist;
sc = device_get_softc(dev); sc = device_get_softc(dev);
return (bus_read_4(sc->gic_redists.pcpu[PCPU_GET(cpuid)], offset)); rdist = &sc->gic_redists.pcpu[PCPU_GET(cpuid)]->res;
return (bus_read_4(rdist, offset));
} }
uint64_t uint64_t
gic_r_read_8(device_t dev, bus_size_t offset) gic_r_read_8(device_t dev, bus_size_t offset)
{ {
struct gic_v3_softc *sc; struct gic_v3_softc *sc;
struct resource *rdist;
sc = device_get_softc(dev); sc = device_get_softc(dev);
return (bus_read_8(sc->gic_redists.pcpu[PCPU_GET(cpuid)], offset)); rdist = &sc->gic_redists.pcpu[PCPU_GET(cpuid)]->res;
return (bus_read_8(rdist, offset));
} }
void void
gic_r_write_4(device_t dev, bus_size_t offset, uint32_t val) gic_r_write_4(device_t dev, bus_size_t offset, uint32_t val)
{ {
struct gic_v3_softc *sc; struct gic_v3_softc *sc;
struct resource *rdist;
sc = device_get_softc(dev); sc = device_get_softc(dev);
bus_write_4(sc->gic_redists.pcpu[PCPU_GET(cpuid)], offset, val); rdist = &sc->gic_redists.pcpu[PCPU_GET(cpuid)]->res;
bus_write_4(rdist, offset, val);
} }
void void
gic_r_write_8(device_t dev, bus_size_t offset, uint64_t val) gic_r_write_8(device_t dev, bus_size_t offset, uint64_t val)
{ {
struct gic_v3_softc *sc; struct gic_v3_softc *sc;
struct resource *rdist;
sc = device_get_softc(dev); sc = device_get_softc(dev);
bus_write_8(sc->gic_redists.pcpu[PCPU_GET(cpuid)], offset, val); rdist = &sc->gic_redists.pcpu[PCPU_GET(cpuid)]->res;
bus_write_8(rdist, offset, val);
} }
/* /*
* Device interface. * Device interface.
*/ */
int int
gic_v3_attach(device_t dev) gic_v3_attach(device_t dev)
{ {
▲ Show 20 Lines • Show All 155 Lines • ▼ Show 20 Linesgic_v3_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
sc = device_get_softc(dev); sc = device_get_softc(dev);
switch (which) { switch (which) {
case GICV3_IVAR_NIRQS: case GICV3_IVAR_NIRQS:
*result = (NIRQ - sc->gic_nirqs) / sc->gic_nchildren; *result = (NIRQ - sc->gic_nirqs) / sc->gic_nchildren;
return (0); return (0);
case GICV3_IVAR_REDIST_VADDR: case GICV3_IVAR_REDIST_VADDR:
*result = (uintptr_t)rman_get_virtual( *result = (uintptr_t)rman_get_virtual(
sc->gic_redists.pcpu[PCPU_GET(cpuid)]); &sc->gic_redists.pcpu[PCPU_GET(cpuid)]->res);
return (0); return (0);
case GICV3_IVAR_REDIST:
*result = (uintptr_t)sc->gic_redists.pcpu[PCPU_GET(cpuid)];
return (0);
case GIC_IVAR_HW_REV: case GIC_IVAR_HW_REV:
KASSERT( KASSERT(
GICR_PIDR2_ARCH(sc->gic_pidr2) == GICR_PIDR2_ARCH_GICv3 || GICR_PIDR2_ARCH(sc->gic_pidr2) == GICR_PIDR2_ARCH_GICv3 ||
GICR_PIDR2_ARCH(sc->gic_pidr2) == GICR_PIDR2_ARCH_GICv4, GICR_PIDR2_ARCH(sc->gic_pidr2) == GICR_PIDR2_ARCH_GICv4,
("gic_v3_read_ivar: Invalid GIC architecture: %d (%.08X)", ("gic_v3_read_ivar: Invalid GIC architecture: %d (%.08X)",
GICR_PIDR2_ARCH(sc->gic_pidr2), sc->gic_pidr2)); GICR_PIDR2_ARCH(sc->gic_pidr2), sc->gic_pidr2));
*result = GICR_PIDR2_ARCH(sc->gic_pidr2); *result = GICR_PIDR2_ARCH(sc->gic_pidr2);
return (0); return (0);
▲ Show 20 Lines • Show All 577 Lines • ▼ Show 20 Linesgic_v3_wait_for_rwp(struct gic_v3_softc *sc, enum gic_v3_xdist xdist)
cpuid = PCPU_GET(cpuid); cpuid = PCPU_GET(cpuid);
switch (xdist) { switch (xdist) {
case DIST: case DIST:
res = sc->gic_dist; res = sc->gic_dist;
break; break;
case REDIST: case REDIST:
res = sc->gic_redists.pcpu[cpuid]; res = &sc->gic_redists.pcpu[cpuid]->res;
break; break;
default: default:
KASSERT(0, ("%s: Attempt to wait for unknown RWP", __func__)); KASSERT(0, ("%s: Attempt to wait for unknown RWP", __func__));
return; return;
} }
while ((bus_read_4(res, GICD_CTLR) & GICD_CTLR_RWP) != 0) { while ((bus_read_4(res, GICD_CTLR) & GICD_CTLR_RWP) != 0) {
DELAY(1); DELAY(1);
▲ Show 20 Lines • Show All 177 Lines • ▼ Show 20 Lines for (i = 0; i < sc->gic_redists.nregions; i++) {
} }
do { do {
typer = bus_read_8(&r_res, GICR_TYPER); typer = bus_read_8(&r_res, GICR_TYPER);
if ((typer >> GICR_TYPER_AFF_SHIFT) == aff) { if ((typer >> GICR_TYPER_AFF_SHIFT) == aff) {
KASSERT(sc->gic_redists.pcpu[cpuid] != NULL, KASSERT(sc->gic_redists.pcpu[cpuid] != NULL,
("Invalid pointer to per-CPU redistributor")); ("Invalid pointer to per-CPU redistributor"));
/* Copy res contents to its final destination */ /* Copy res contents to its final destination */
*sc->gic_redists.pcpu[cpuid] = r_res; sc->gic_redists.pcpu[cpuid]->res = r_res;
if (bootverbose) { if (bootverbose) {
device_printf(sc->dev, device_printf(sc->dev,
"CPU%u Re-Distributor has been found\n", "CPU%u Re-Distributor has been found\n",
cpuid); cpuid);
} }
return (0); return (0);
} }
▲ Show 20 Lines • Show All 79 Lines • Show Last 20 Lines