Changeset View
Changeset View
Standalone View
Standalone View
head/sys/x86/include/specialreg.h
| Show First 20 Lines • Show All 1,092 Lines • ▼ Show 20 Lines | |||||
| #define MSR_P_STATE_STATUS 0xc0010063 /* P-state Status Register */ | #define MSR_P_STATE_STATUS 0xc0010063 /* P-state Status Register */ | ||||
| #define MSR_P_STATE_CONFIG(n) (0xc0010064 + (n)) /* P-state Config */ | #define MSR_P_STATE_CONFIG(n) (0xc0010064 + (n)) /* P-state Config */ | ||||
| #define MSR_SMM_ADDR 0xc0010112 /* SMM TSEG base address */ | #define MSR_SMM_ADDR 0xc0010112 /* SMM TSEG base address */ | ||||
| #define MSR_SMM_MASK 0xc0010113 /* SMM TSEG address mask */ | #define MSR_SMM_MASK 0xc0010113 /* SMM TSEG address mask */ | ||||
| #define MSR_VM_CR 0xc0010114 /* SVM: feature control */ | #define MSR_VM_CR 0xc0010114 /* SVM: feature control */ | ||||
| #define MSR_VM_HSAVE_PA 0xc0010117 /* SVM: host save area address */ | #define MSR_VM_HSAVE_PA 0xc0010117 /* SVM: host save area address */ | ||||
| #define MSR_AMD_CPUID07 0xc0011002 /* CPUID 07 %ebx override */ | #define MSR_AMD_CPUID07 0xc0011002 /* CPUID 07 %ebx override */ | ||||
| #define MSR_EXTFEATURES 0xc0011005 /* Extended CPUID Features override */ | #define MSR_EXTFEATURES 0xc0011005 /* Extended CPUID Features override */ | ||||
| #define MSR_LS_CFG 0xc0011020 | |||||
| #define MSR_IC_CFG 0xc0011021 /* Instruction Cache Configuration */ | #define MSR_IC_CFG 0xc0011021 /* Instruction Cache Configuration */ | ||||
| /* MSR_VM_CR related */ | /* MSR_VM_CR related */ | ||||
| #define VM_CR_SVMDIS 0x10 /* SVM: disabled by BIOS */ | #define VM_CR_SVMDIS 0x10 /* SVM: disabled by BIOS */ | ||||
| /* VIA ACE crypto featureset: for via_feature_rng */ | /* VIA ACE crypto featureset: for via_feature_rng */ | ||||
| #define VIA_HAS_RNG 1 /* cpu has RNG */ | #define VIA_HAS_RNG 1 /* cpu has RNG */ | ||||
| Show All 34 Lines | |||||