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contrib/llvm/tools/lld/ELF/Arch/PPC64.cpp
Show First 20 Lines • Show All 107 Lines • ▼ Show 20 Lines | RelExpr getRelExpr(RelType Type, const Symbol &S, | ||||
const uint8_t *Loc) const override; | const uint8_t *Loc) const override; | ||||
void writePltHeader(uint8_t *Buf) const override; | void writePltHeader(uint8_t *Buf) const override; | ||||
void writePlt(uint8_t *Buf, uint64_t GotPltEntryAddr, uint64_t PltEntryAddr, | void writePlt(uint8_t *Buf, uint64_t GotPltEntryAddr, uint64_t PltEntryAddr, | ||||
int32_t Index, unsigned RelOff) const override; | int32_t Index, unsigned RelOff) const override; | ||||
void relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const override; | void relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const override; | ||||
void writeGotHeader(uint8_t *Buf) const override; | void writeGotHeader(uint8_t *Buf) const override; | ||||
bool needsThunk(RelExpr Expr, RelType Type, const InputFile *File, | bool needsThunk(RelExpr Expr, RelType Type, const InputFile *File, | ||||
uint64_t BranchAddr, const Symbol &S) const override; | uint64_t BranchAddr, const Symbol &S) const override; | ||||
uint32_t getThunkSectionSpacing() const override; | |||||
bool inBranchRange(RelType Type, uint64_t Src, uint64_t Dst) const override; | bool inBranchRange(RelType Type, uint64_t Src, uint64_t Dst) const override; | ||||
RelExpr adjustRelaxExpr(RelType Type, const uint8_t *Data, | RelExpr adjustRelaxExpr(RelType Type, const uint8_t *Data, | ||||
RelExpr Expr) const override; | RelExpr Expr) const override; | ||||
void relaxTlsGdToIe(uint8_t *Loc, RelType Type, uint64_t Val) const override; | void relaxTlsGdToIe(uint8_t *Loc, RelType Type, uint64_t Val) const override; | ||||
void relaxTlsGdToLe(uint8_t *Loc, RelType Type, uint64_t Val) const override; | void relaxTlsGdToLe(uint8_t *Loc, RelType Type, uint64_t Val) const override; | ||||
void relaxTlsLdToLe(uint8_t *Loc, RelType Type, uint64_t Val) const override; | void relaxTlsLdToLe(uint8_t *Loc, RelType Type, uint64_t Val) const override; | ||||
void relaxTlsIeToLe(uint8_t *Loc, RelType Type, uint64_t Val) const override; | void relaxTlsIeToLe(uint8_t *Loc, RelType Type, uint64_t Val) const override; | ||||
▲ Show 20 Lines • Show All 628 Lines • ▼ Show 20 Lines | bool PPC64::needsThunk(RelExpr Expr, RelType Type, const InputFile *File, | ||||
// If a symbol is a weak undefined and we are compiling an executable | // If a symbol is a weak undefined and we are compiling an executable | ||||
// it doesn't need a range-extending thunk since it can't be called. | // it doesn't need a range-extending thunk since it can't be called. | ||||
if (S.isUndefWeak() && !Config->Shared) | if (S.isUndefWeak() && !Config->Shared) | ||||
return false; | return false; | ||||
// If the offset exceeds the range of the branch type then it will need | // If the offset exceeds the range of the branch type then it will need | ||||
// a range-extending thunk. | // a range-extending thunk. | ||||
return !inBranchRange(Type, BranchAddr, S.getVA()); | return !inBranchRange(Type, BranchAddr, S.getVA()); | ||||
} | |||||
uint32_t PPC64::getThunkSectionSpacing() const { | |||||
// See comment in Arch/ARM.cpp for a more detailed explanation of | |||||
// getThunkSectionSpacing(). For PPC64 we pick the constant here based on | |||||
// R_PPC64_REL24, which is used by unconditional branch instructions. | |||||
// 0x2000000 = (1 << 24-1) * 4 | |||||
return 0x2000000; | |||||
} | } | ||||
bool PPC64::inBranchRange(RelType Type, uint64_t Src, uint64_t Dst) const { | bool PPC64::inBranchRange(RelType Type, uint64_t Src, uint64_t Dst) const { | ||||
int64_t Offset = Dst - Src; | int64_t Offset = Dst - Src; | ||||
if (Type == R_PPC64_REL14) | if (Type == R_PPC64_REL14) | ||||
return isInt<16>(Offset); | return isInt<16>(Offset); | ||||
if (Type == R_PPC64_REL24) | if (Type == R_PPC64_REL24) | ||||
return isInt<26>(Offset); | return isInt<26>(Offset); | ||||
▲ Show 20 Lines • Show All 164 Lines • Show Last 20 Lines |