Page MenuHomeFreeBSD
Differential D20145 Diff 56978 sys/compat/linprocfs/linprocfs.c

Changeset View

Standalone View

View Options

sys/compat/linprocfs/linprocfs.c

Show First 20 Lines • Show All 206 Lines • ▼ Show 20 Lineslinprocfs_docpuinfo(PFS_FILL_ARGS)
u_int cache_size[4]; u_int cache_size[4];
int fqmhz, fqkhz; int fqmhz, fqkhz;
int i, j; int i, j;
/* /*
* We default the flags to include all non-conflicting flags, * We default the flags to include all non-conflicting flags,
* and the Intel versions of conflicting flags. * and the Intel versions of conflicting flags.
*/ */
static char *flags[] = { static char *cpu_feature_names[] = {
"fpu", "vme", "de", "pse", "tsc", /* 0 */ "fpu", "vme", "de", "pse",
"msr", "pae", "mce", "cx8", "apic", /* 4 */ "tsc", "msr", "pae", "mce",
"", "sep", "mtrr", "pge", "mca", /* 8 */ "cx8", "apic", "", "sep",
"cmov", "pat", "pse36", "pn", "clflush", /* 12 */ "mtrr", "pge", "mca", "cmov",
"", "dts", "acpi", "mmx", "fxsr", /* 16 */ "pat", "pse36", "pn", "clflush",
"sse", "sse2", "ss", "ht", "tm", /* 20 */ "", "dts", "acpi", "mmx",
"ia64", "pbe" /* 24 */ "fxsr", "sse", "sse2", "ss",
/* 28 */ "ht", "tm", "ia64", "pbe"
}; };
static char *amd_feature_names[] = {
/* 0 */ "", "", "", "",
/* 4 */ "", "", "", "",
/* 8 */ "", "", "", "syscall",
/* 12 */ "", "", "", "",
/* 16 */ "", "", "", "mp",
/* 20 */ "nx", "", "mmxext", "",
/* 24 */ "", "fxsr_opt", "pdpe1gb", "rdtscp",
/* 28 */ "", "lm", "3dnowext", "3dnow"
};
static char *cpu_feature2_names[] = {
/* 0 */ "pni", "pclmulqdq", "dtes3", "monitor",
/* 4 */ "ds_cpl", "vmx", "smx", "est",
/* 8 */ "tm2", "ssse3", "cid", "sdbg",
/* 12 */ "fma", "cx16", "xptr", "pdcm",
/* 16 */ "", "pcid", "dca", "sse4_1",
/* 20 */ "sse4_2", "x2apic", "movbe", "popcnt",
/* 24 */ "tsc_deadline_timer", "aes", "xsave", "",
/* 28 */ "avx", "f16c", "rdrand", "hypervisor"
};
static char *amd_feature2_names[] = {
/* 0 */ "lahf_lm", "cmp_legacy", "svm", "extapic",
/* 4 */ "cr8_legacy", "abm", "sse4a", "misalignsse",
/* 8 */ "3dnowprefetch", "osvw", "ibs", "xop",
/* 12 */ "skinit", "wdt", "", "lwp",
/* 16 */ "fma4", "tce", "", "nodeid_msr",
/* 20 */ "", "tbm", "topoext", "perfctr_core",
/* 24 */ "perfctr_nb", "", "bpext", "ptsc",
/* 28 */ "perfctr_llc", "mwaitx", "", ""
};
static char *cpu_stdext_feature_names[] = {
/* 0 */ "fsgsbase", "tsc_adjust", "", "bmi1",
/* 4 */ "hle", "avx2", "", "smep",
/* 8 */ "bmi2", "erms", "invpcid", "rtm",
/* 12 */ "cqm", "", "mpx", "rdt_a",
/* 16 */ "avx512f", "avx512dq", "rdseed", "adx",
/* 20 */ "smap", "avx512ifma", "", "clflushopt",
/* 24 */ "clwb", "intel_pt", "avx512pf", "avx512er",
/* 28 */ "avx512cd", "sha_ni", "avx512bw", "avx512vl"
};
static char *power_flags[] = { static char *power_flags[] = {
"ts", "fid", "vid", "ts", "fid", "vid",
"ttp", "tm", "stc", "ttp", "tm", "stc",
"100mhzsteps", "hwpstate", "", "100mhzsteps", "hwpstate", "",
"cpb", "eff_freq_ro", "proc_feedback", "cpb", "eff_freq_ro", "proc_feedback",
"acc_power", "acc_power",
}; };
hw_model[0] = CTL_HW; hw_model[0] = CTL_HW;
hw_model[1] = HW_MODEL; hw_model[1] = HW_MODEL;
model[0] = '\0'; model[0] = '\0';
size = sizeof(model); size = sizeof(model);
if (kernel_sysctl(td, hw_model, 2, &model, &size, 0, 0, 0, 0) != 0) if (kernel_sysctl(td, hw_model, 2, &model, &size, 0, 0, 0, 0) != 0)
strcpy(model, "unknown"); strcpy(model, "unknown");
#ifdef __i386__ #ifdef __i386__
switch (cpu_vendor_id) { switch (cpu_vendor_id) {
case CPU_VENDOR_AMD: case CPU_VENDOR_AMD:
if (cpu_class < CPUCLASS_686) if (cpu_class < CPUCLASS_686)
flags[16] = "fcmov"; cpu_feature_names[16] = "fcmov";
break; break;
case CPU_VENDOR_CYRIX: case CPU_VENDOR_CYRIX:
flags[24] = "cxmmx"; cpu_feature_names[24] = "cxmmx";
break; break;
} }
#endif #endif
if (cpu_exthigh >= 0x80000006) if (cpu_exthigh >= 0x80000006)
do_cpuid(0x80000006, cache_size); do_cpuid(0x80000006, cache_size);
else else
memset(cache_size, 0, sizeof(cache_size)); memset(cache_size, 0, sizeof(cache_size));
for (i = 0; i < mp_ncpus; ++i) { for (i = 0; i < mp_ncpus; ++i) {
Show All 26 Lines sbuf_printf(sb,
i, cpu_vendor, CPUID_TO_FAMILY(cpu_id), i, cpu_vendor, CPUID_TO_FAMILY(cpu_id),
CPUID_TO_MODEL(cpu_id), model, cpu_id & CPUID_STEPPING, CPUID_TO_MODEL(cpu_id), model, cpu_id & CPUID_STEPPING,
fqmhz, fqkhz, fqmhz, fqkhz,
(cache_size[2] >> 16), 0, mp_ncpus, i, mp_ncpus, (cache_size[2] >> 16), 0, mp_ncpus, i, mp_ncpus,
i, i, /*cpu_id & CPUID_LOCAL_APIC_ID ??*/ i, i, /*cpu_id & CPUID_LOCAL_APIC_ID ??*/
(cpu_feature & CPUID_FPU) ? "yes" : "no", "yes", (cpu_feature & CPUID_FPU) ? "yes" : "no", "yes",
CPUID_TO_FAMILY(cpu_id), "yes"); CPUID_TO_FAMILY(cpu_id), "yes");
sbuf_cat(sb, "flags\t\t:"); sbuf_cat(sb, "flags\t\t:");
for (j = 0; j < nitems(flags); j++) for (j = 0; j < nitems(cpu_feature_names); j++)
if (cpu_feature & (1 << j) && flags[j][0] != '\0') if (cpu_feature & (1 << j) &&
sbuf_printf(sb, " %s", flags[j]); cpu_feature_names[j][0] != '\0')
sbuf_printf(sb, " %s", cpu_feature_names[j]);
for (j = 0; j < nitems(amd_feature_names); j++)
if (amd_feature & (1 << j) &&
amd_feature_names[j][0] != '\0')
sbuf_printf(sb, " %s", amd_feature_names[j]);
for (j = 0; j < nitems(cpu_feature2_names); j++)
if (cpu_feature2 & (1 << j) &&
cpu_feature2_names[j][0] != '\0')
sbuf_printf(sb, " %s", cpu_feature2_names[j]);
for (j = 0; j < nitems(amd_feature2_names); j++)
if (amd_feature2 & (1 << j) &&
amd_feature2_names[j][0] != '\0')
sbuf_printf(sb, " %s", amd_feature2_names[j]);
for (j = 0; j < nitems(cpu_stdext_feature_names); j++)
if (cpu_stdext_feature & (1 << j) &&
cpu_stdext_feature_names[j][0] != '\0')
sbuf_printf(sb, " %s",
cpu_stdext_feature_names[j]);
sbuf_cat(sb, "\n"); sbuf_cat(sb, "\n");
sbuf_printf(sb, sbuf_printf(sb,
"bugs\t\t: %s\n" "bugs\t\t: %s\n"
"bogomips\t: %d.%02d\n" "bogomips\t: %d.%02d\n"
"clflush size\t: %d\n" "clflush size\t: %d\n"
"cache_alignment\t: %d\n" "cache_alignment\t: %d\n"
"address sizes\t: %d bits physical, %d bits virtual\n", "address sizes\t: %d bits physical, %d bits virtual\n",
#if defined(I586_CPU) && !defined(NO_F00F_HACK) #if defined(I586_CPU) && !defined(NO_F00F_HACK)
▲ Show 20 Lines • Show All 1,455 Lines • Show Last 20 Lines