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sys/powerpc/powernv/opal_pci.c
| Show First 20 Lines • Show All 137 Lines • ▼ Show 20 Lines | static device_method_t opalpci_methods[] = { | ||||
| DEVMETHOD(pcib_alloc_msi, opalpci_alloc_msi), | DEVMETHOD(pcib_alloc_msi, opalpci_alloc_msi), | ||||
| DEVMETHOD(pcib_release_msi, opalpci_release_msi), | DEVMETHOD(pcib_release_msi, opalpci_release_msi), | ||||
| DEVMETHOD(pcib_alloc_msix, opalpci_alloc_msix), | DEVMETHOD(pcib_alloc_msix, opalpci_alloc_msix), | ||||
| DEVMETHOD(pcib_release_msix, opalpci_release_msix), | DEVMETHOD(pcib_release_msix, opalpci_release_msix), | ||||
| DEVMETHOD(pcib_map_msi, opalpci_map_msi), | DEVMETHOD(pcib_map_msi, opalpci_map_msi), | ||||
| DEVMETHOD(pcib_route_interrupt, opalpci_route_interrupt), | DEVMETHOD(pcib_route_interrupt, opalpci_route_interrupt), | ||||
| /* Bus interface */ | |||||
| DEVMETHOD(bus_get_dma_tag, opalpci_get_dma_tag), | |||||
| DEVMETHOD(bus_get_cpus, ofw_pcibus_get_cpus), | |||||
| DEVMETHOD(bus_get_domain, ofw_pcibus_get_domain), | |||||
| /* PIC interface for MSIs */ | /* PIC interface for MSIs */ | ||||
| DEVMETHOD(pic_enable, opalpic_pic_enable), | DEVMETHOD(pic_enable, opalpic_pic_enable), | ||||
| DEVMETHOD(pic_eoi, opalpic_pic_eoi), | DEVMETHOD(pic_eoi, opalpic_pic_eoi), | ||||
| /* Bus interface */ | |||||
| DEVMETHOD(bus_get_dma_tag, opalpci_get_dma_tag), | |||||
| DEVMETHOD_END | DEVMETHOD_END | ||||
| }; | }; | ||||
| struct opalpci_softc { | struct opalpci_softc { | ||||
| struct ofw_pci_softc ofw_sc; | struct ofw_pci_softc ofw_sc; | ||||
| uint64_t phb_id; | uint64_t phb_id; | ||||
| vmem_t *msi_vmem; | vmem_t *msi_vmem; | ||||
| int msi_base; /* Base XIVE number */ | int msi_base; /* Base XIVE number */ | ||||
| ▲ Show 20 Lines • Show All 201 Lines • ▼ Show 20 Lines | #endif | ||||
| /* | /* | ||||
| * Enable IOMMU for PE1 - map everything 1:1 using | * Enable IOMMU for PE1 - map everything 1:1 using | ||||
| * segments of max_tce_size size | * segments of max_tce_size size | ||||
| */ | */ | ||||
| tce_size = max_tce_size(dev); | tce_size = max_tce_size(dev); | ||||
| maxmem = roundup2(powerpc_ptob(Maxmem), tce_size); | maxmem = roundup2(powerpc_ptob(Maxmem), tce_size); | ||||
| entries = round_pow2(maxmem / tce_size); | entries = round_pow2(maxmem / tce_size); | ||||
| tce_tbl_size = max(entries * sizeof(uint64_t), 4096); | tce_tbl_size = MAX(entries * sizeof(uint64_t), 4096); | ||||
| if (entries > OPAL_PCI_TCE_MAX_ENTRIES) | if (entries > OPAL_PCI_TCE_MAX_ENTRIES) | ||||
| panic("POWERNV supports only %jdGB of memory space\n", | panic("POWERNV supports only %jdGB of memory space\n", | ||||
| (uintmax_t)((OPAL_PCI_TCE_MAX_ENTRIES * tce_size) >> 30)); | (uintmax_t)((OPAL_PCI_TCE_MAX_ENTRIES * tce_size) >> 30)); | ||||
| if (bootverbose) | if (bootverbose) | ||||
| device_printf(dev, "Mapping 0-%#jx for DMA\n", (uintmax_t)maxmem); | device_printf(dev, "Mapping 0-%#jx for DMA\n", (uintmax_t)maxmem); | ||||
| sc->tce = contigmalloc(tce_tbl_size, | sc->tce = contigmalloc(tce_tbl_size, | ||||
| M_DEVBUF, M_NOWAIT | M_ZERO, 0, | M_DEVBUF, M_NOWAIT | M_ZERO, 0, | ||||
| BUS_SPACE_MAXADDR, tce_tbl_size, 0); | BUS_SPACE_MAXADDR, tce_tbl_size, 0); | ||||
| ▲ Show 20 Lines • Show All 325 Lines • Show Last 20 Lines | |||||