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sys/dev/etherswitch/mtkswitch/mtkswitch_rt3050.h
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#define POA_GE_XFC_RX_MSK 0x1 | #define POA_GE_XFC_RX_MSK 0x1 | ||||
#define POA_GE_SPEED_10 0x0 | #define POA_GE_SPEED_10 0x0 | ||||
#define POA_GE_SPEED_100 0x1 | #define POA_GE_SPEED_100 0x1 | ||||
#define POA_GE_SPEED_1000 0x2 | #define POA_GE_SPEED_1000 0x2 | ||||
#define MTKSWITCH_FPA 0x0084 | #define MTKSWITCH_FPA 0x0084 | ||||
#define FPA_ALL_AUTO 0x00000000 | #define FPA_ALL_AUTO 0x00000000 | ||||
#define MTKSWITCH_SOCPC 0x008c | |||||
#define SOCPC_DISUN2C(x) (1 << (x)) | |||||
#define SOCPC_DISMC2C(x) ((1 << (x)) << 8) | |||||
#define SOCPC_DISBC2C(x) ((1 << (x)) << 16) | |||||
#define SOCPC_CRC_PADDING 0x02000000 | |||||
#define MTKSWITCH_POC0 0x0090 | |||||
#define POC0_DIS_PORT_MSK 0x0f800000 | |||||
#define POC0_DIS_GPORT1_MSK 0x10000000 | |||||
#define POC0_DIS_GPORT2_MSK 0x20000000 | |||||
#define MTKSWITCH_POC2 0x0098 | #define MTKSWITCH_POC2 0x0098 | ||||
#define POC2_UNTAG_PORT(x) (1 << (x)) | #define POC2_UNTAG_PORT(x) (1 << (x)) | ||||
#define POC2_UNTAG_VLAN (1 << 15) | #define POC2_UNTAG_VLAN (1 << 15) | ||||
#define MTKSWITCH_STRT 0x00a0 | #define MTKSWITCH_STRT 0x00a0 | ||||
#define STRT_RESET 0xffffffff | #define STRT_RESET 0xffffffff | ||||
#define MTKSWITCH_PCR0 0x00c0 | #define MTKSWITCH_PCR0 0x00c0 | ||||
#define PCR0_WRITE (1<<13) | #define PCR0_WRITE (1<<13) | ||||
#define PCR0_READ (1<<14) | #define PCR0_READ (1<<14) | ||||
#define PCR0_ACTIVE (PCR0_WRITE | PCR0_READ) | #define PCR0_ACTIVE (PCR0_WRITE | PCR0_READ) | ||||
#define PCR0_REG(x) (((x) & 0x1f) << 8) | #define PCR0_REG(x) (((x) & 0x1f) << 8) | ||||
#define PCR0_PHY(x) ((x) & 0x1f) | #define PCR0_PHY(x) ((x) & 0x1f) | ||||
#define PCR0_DATA(x) (((x) & 0xffff) << 16) | #define PCR0_DATA(x) (((x) & 0xffff) << 16) | ||||
#define MTKSWITCH_PCR1 0x00c4 | #define MTKSWITCH_PCR1 0x00c4 | ||||
#define PCR1_DATA_OFF 16 | #define PCR1_DATA_OFF 16 | ||||
#define PCR1_DATA_MASK 0xffff | #define PCR1_DATA_MASK 0xffff | ||||
#define MTKSWITCH_FPA2 0x00c8 | |||||
#define MTKSWITCH_FCT2 0x00cc | |||||
#define MTKSWITCH_SGC2 0x00e4 | #define MTKSWITCH_SGC2 0x00e4 | ||||
#define SGC2_DOUBLE_TAG_PORT(x) (1 << (x)) | #define SGC2_DOUBLE_TAG_PORT(x) (1 << (x)) | ||||
#define MTKSWITCH_VUB(x) ((((x) >> 2) * 4) + 0x100) | #define MTKSWITCH_VUB(x) ((((x) >> 2) * 4) + 0x100) | ||||
#define VUB_OFF(x) ((x & 3) * 7) | #define VUB_OFF(x) ((x & 3) * 7) | ||||
#define VUB_MASK 0x7f | #define VUB_MASK 0x7f | ||||
#define MTKSWITCH_PORT_IS_100M(x) ((x) < 5) | #define MTKSWITCH_PORT_IS_100M(x) ((x) < 5) | ||||
#endif /* __MTKSWITCH_RT3050_H__ */ | #endif /* __MTKSWITCH_RT3050_H__ */ |