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sys/dev/uart/uart_cpu_arm64.c
Context not available. | |||||
static int | static int | ||||
uart_cpu_acpi_probe(struct uart_class **classp, bus_space_tag_t *bst, | uart_cpu_acpi_probe(struct uart_class **classp, bus_space_tag_t *bst, | ||||
bus_space_handle_t *bsh, int *baud, u_int *rclk, u_int *shiftp, | bus_space_handle_t *bsh, int *baud, u_int *rclk, u_int *shiftp, | ||||
u_int *iowidthp) | u_int *iowidthp, struct uart_pci_info *pcip) | ||||
{ | { | ||||
struct acpi_uart_compat_data *cd; | struct acpi_uart_compat_data *cd; | ||||
ACPI_TABLE_SPCR *spcr; | ACPI_TABLE_SPCR *spcr; | ||||
Context not available. | |||||
*shiftp = spcr->SerialPort.AccessWidth - 1; | *shiftp = spcr->SerialPort.AccessWidth - 1; | ||||
*iowidthp = spcr->SerialPort.BitWidth / 8; | *iowidthp = spcr->SerialPort.BitWidth / 8; | ||||
if (spcr->InterfaceType == ACPI_DBG2_ARM_SBSA_32BIT || | |||||
andrew: `ACPI_DBG2_ARM_SBSA_32BIT` should be added to the pl011 acpi compat data so this is unneeded. | |||||
(spcr->InterfaceType == ACPI_DBG2_ARM_PL011 && | |||||
spcr->SerialPort.BitWidth == 32 && | |||||
Not Done Inline Actionssmall nit: {} optional. no big deal either way. imp: small nit: {} optional. no big deal either way.
| |||||
spcr->SerialPort.AccessWidth == 1)) { | |||||
Done Inline ActionsDo we need the BitWidth and AccessWidth checks? andrew: Do we need the BitWidth and AccessWidth checks? | |||||
/* PL011 on SBSA platforms uses 32-bit access, but on e.g. | |||||
Done Inline ActionsThis should be if ((cd->cd_quirks & UART_F_IGNORE_SPCR_REGSHFT) == UART_F_IGNORE_SPCR_REGSHFT) { andrew: This should be
```
if ((cd->cd_quirks & UART_F_IGNORE_SPCR_REGSHFT) ==… | |||||
* the Lenovo HR330A (Ampere eMAG), SPCR reports | |||||
* 32-bit width and 8-bit access */ | |||||
*shiftp = 2; | |||||
} | |||||
pcip->vendor = spcr->PciVendorId; | |||||
Done Inline ActionsShould still default to *shiftp = 2 in this case I think? emaste: Should still default to `*shiftp = 2` in this case I think? | |||||
pcip->device = spcr->PciDeviceId; | |||||
pcip->bus = spcr->PciBus; | |||||
pcip->slot = spcr->PciDevice; | |||||
out: | out: | ||||
acpi_unmap_table(spcr); | acpi_unmap_table(spcr); | ||||
return (err); | return (err); | ||||
Context not available. | |||||
err = ENXIO; | err = ENXIO; | ||||
#ifdef DEV_ACPI | #ifdef DEV_ACPI | ||||
err = uart_cpu_acpi_probe(&class, &bst, &bsh, &br, &rclk, &shift, | err = uart_cpu_acpi_probe(&class, &bst, &bsh, &br, &rclk, &shift, | ||||
&iowidth); | &iowidth, &di->pci_info); | ||||
#endif | #endif | ||||
#ifdef FDT | #ifdef FDT | ||||
if (err != 0) { | if (err != 0) { | ||||
Context not available. |
ACPI_DBG2_ARM_SBSA_32BIT should be added to the pl011 acpi compat data so this is unneeded.