Changeset View
Changeset View
Standalone View
Standalone View
sys/dev/uart/uart_cpu_arm64.c
Show First 20 Lines • Show All 59 Lines • ▼ Show 20 Lines | |||||
#include <dev/ofw/ofw_bus.h> | #include <dev/ofw/ofw_bus.h> | ||||
#include <dev/ofw/ofw_bus_subr.h> | #include <dev/ofw/ofw_bus_subr.h> | ||||
#include <dev/uart/uart_cpu_fdt.h> | #include <dev/uart/uart_cpu_fdt.h> | ||||
#endif | #endif | ||||
/* | /* | ||||
* UART console routines. | * UART console routines. | ||||
*/ | */ | ||||
extern struct bus_space memmap_bus; | |||||
bus_space_tag_t uart_bus_space_io; | bus_space_tag_t uart_bus_space_io; | ||||
bus_space_tag_t uart_bus_space_mem; | bus_space_tag_t uart_bus_space_mem = &memmap_bus; | ||||
int | int | ||||
uart_cpu_eqres(struct uart_bas *b1, struct uart_bas *b2) | uart_cpu_eqres(struct uart_bas *b1, struct uart_bas *b2) | ||||
{ | { | ||||
if (pmap_kextract(b1->bsh) == 0) | if (pmap_kextract(b1->bsh) == 0) | ||||
return (0); | return (0); | ||||
if (pmap_kextract(b2->bsh) == 0) | if (pmap_kextract(b2->bsh) == 0) | ||||
Show All 25 Lines | uart_cpu_acpi_scan(uint8_t interface_type) | ||||
} | } | ||||
return (NULL); | return (NULL); | ||||
} | } | ||||
static int | static int | ||||
uart_cpu_acpi_probe(struct uart_class **classp, bus_space_tag_t *bst, | uart_cpu_acpi_probe(struct uart_class **classp, bus_space_tag_t *bst, | ||||
bus_space_handle_t *bsh, int *baud, u_int *rclk, u_int *shiftp, | bus_space_handle_t *bsh, int *baud, u_int *rclk, u_int *shiftp, | ||||
u_int *iowidthp) | u_int *iowidthp, struct uart_pci_info *pcip) | ||||
{ | { | ||||
struct acpi_uart_compat_data *cd; | struct acpi_uart_compat_data *cd; | ||||
ACPI_TABLE_SPCR *spcr; | ACPI_TABLE_SPCR *spcr; | ||||
vm_paddr_t spcr_physaddr; | vm_paddr_t spcr_physaddr; | ||||
int err; | int err; | ||||
err = ENXIO; | err = ENXIO; | ||||
spcr_physaddr = acpi_find_table(ACPI_SIG_SPCR); | spcr_physaddr = acpi_find_table(ACPI_SIG_SPCR); | ||||
Show All 23 Lines | default: | ||||
goto out; | goto out; | ||||
} | } | ||||
err = acpi_map_addr(&spcr->SerialPort, bst, bsh, PAGE_SIZE); | err = acpi_map_addr(&spcr->SerialPort, bst, bsh, PAGE_SIZE); | ||||
if (err != 0) | if (err != 0) | ||||
goto out; | goto out; | ||||
*classp = cd->cd_class; | *classp = cd->cd_class; | ||||
*shiftp = spcr->SerialPort.AccessWidth - 1; | |||||
*rclk = 0; | *rclk = 0; | ||||
*shiftp = 2; | |||||
*iowidthp = spcr->SerialPort.BitWidth / 8; | *iowidthp = spcr->SerialPort.BitWidth / 8; | ||||
pcip->vendor = spcr->PciVendorId; | |||||
andrew: `ACPI_DBG2_ARM_SBSA_32BIT` should be added to the pl011 acpi compat data so this is unneeded. | |||||
pcip->device = spcr->PciDeviceId; | |||||
pcip->bus = spcr->PciBus; | |||||
Not Done Inline Actionssmall nit: {} optional. no big deal either way. imp: small nit: {} optional. no big deal either way.
| |||||
pcip->slot = spcr->PciDevice; | |||||
Done Inline ActionsDo we need the BitWidth and AccessWidth checks? andrew: Do we need the BitWidth and AccessWidth checks? | |||||
Done Inline ActionsThis should be if ((cd->cd_quirks & UART_F_IGNORE_SPCR_REGSHFT) == UART_F_IGNORE_SPCR_REGSHFT) { andrew: This should be
```
if ((cd->cd_quirks & UART_F_IGNORE_SPCR_REGSHFT) ==… | |||||
out: | out: | ||||
acpi_unmap_table(spcr); | acpi_unmap_table(spcr); | ||||
return (err); | return (err); | ||||
} | } | ||||
#endif | #endif | ||||
int | int | ||||
uart_cpu_getdev(int devtype, struct uart_devinfo *di) | uart_cpu_getdev(int devtype, struct uart_devinfo *di) | ||||
Done Inline ActionsShould still default to *shiftp = 2 in this case I think? emaste: Should still default to `*shiftp = 2` in this case I think? | |||||
{ | { | ||||
struct uart_class *class; | struct uart_class *class; | ||||
bus_space_handle_t bsh; | bus_space_handle_t bsh; | ||||
bus_space_tag_t bst; | bus_space_tag_t bst; | ||||
u_int rclk, shift, iowidth; | u_int rclk, shift, iowidth; | ||||
int br, err; | int br, err; | ||||
/* Allow overriding the FDT using the environment. */ | /* Allow overriding the FDT using the environment. */ | ||||
class = &uart_ns8250_class; | class = &uart_ns8250_class; | ||||
err = uart_getenv(devtype, di, class); | err = uart_getenv(devtype, di, class); | ||||
if (err == 0) | if (err == 0) | ||||
return (0); | return (0); | ||||
if (devtype != UART_DEV_CONSOLE) | if (devtype != UART_DEV_CONSOLE) | ||||
return (ENXIO); | return (ENXIO); | ||||
err = ENXIO; | err = ENXIO; | ||||
#ifdef DEV_ACPI | #ifdef DEV_ACPI | ||||
err = uart_cpu_acpi_probe(&class, &bst, &bsh, &br, &rclk, &shift, | err = uart_cpu_acpi_probe(&class, &bst, &bsh, &br, &rclk, &shift, | ||||
&iowidth); | &iowidth, &di->pci_info); | ||||
#endif | #endif | ||||
#ifdef FDT | #ifdef FDT | ||||
if (err != 0) { | if (err != 0) { | ||||
err = uart_cpu_fdt_probe(&class, &bst, &bsh, &br, &rclk, | err = uart_cpu_fdt_probe(&class, &bst, &bsh, &br, &rclk, | ||||
&shift, &iowidth); | &shift, &iowidth); | ||||
} | } | ||||
#endif | #endif | ||||
if (err != 0) | if (err != 0) | ||||
Show All 21 Lines |
ACPI_DBG2_ARM_SBSA_32BIT should be added to the pl011 acpi compat data so this is unneeded.